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Carrier-storing grooved gate IGBT with P-type floating layer

A carrier storage and floating layer technology, applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of increased forward voltage drop and poor forward conduction characteristics of devices, so as to reduce forward voltage drop, Effect of improving forward conduction characteristics and increasing design margin

Inactive Publication Date: 2010-04-14
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Abstract
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  • Application Information

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Problems solved by technology

However, due to the introduction of the P-type floating layer, there are two JFET regions "A" and "B", such as Figure 5 As shown, the on-resistance of the device is greatly improved, the forward conduction characteristics of the device become very poor, and the forward voltage drop is greatly increased.

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  • Carrier-storing grooved gate IGBT with P-type floating layer
  • Carrier-storing grooved gate IGBT with P-type floating layer
  • Carrier-storing grooved gate IGBT with P-type floating layer

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Embodiment Construction

[0037] By adopting the novel carrier storage trench gate IGBT structure with P-type floating layer of the present invention, lower on-voltage drop, large forward bias safe operating area (FBSOA) and short circuit safe operating area (SCSOA) can be obtained, and The breakdown voltage can be further improved, the manufacture is simple, and the design margin is large. With the development of semiconductor technology, more power devices with low voltage drop and high reliability can be produced by using the present invention.

[0038] A carrier storage trench gate IGBT with a P-type floating layer, such as Image 6 shown, each cell includes collector 1, P + Collector region 2, P-type collector region 11, N-type buffer layer 3, N - Base region 4, P-type floating layer 13, gate oxide layer 5, polysilicon gate 6, emitter 7, N + Source Region 9, P + Body region 8 , N-type carrier storage layer 12 . The gate oxide layer 5 and the polysilicon gate 6 form a trench deletion structure...

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Abstract

The invention relates to a carrier-storing grooved gate IGBT with a P-type floating layer, belonging to the technical field of semiconductor power devices. On a basis of the prior carrier-storing grooved gate bipolar transistor, a P-type floating layer (13) is introduced to almost free a carrier-storing layer from bearing a withstanding voltage and decrease a forward conducted voltage drop; and the P-type floating layer (13) also improves the electric-field integration effect of the bottom of the grooved gate, thereby effectively decreasing an electric filed with a maximum peak value, preventing the bottom of the grooved gate and the vicinity of the high-concentration carrier-storing layer from being broken down by an overhigh electric field and greatly increasing the breakdown voltage of the device. A JFET zone is introduced due to the existence of the P-type floating layer. When the device is forwardly conducted, the resistance of the JFET zone continuously increases along with the continuously increasing voltage of a collector so that the saturation current of the device is decreased, and a lower conducted voltage drop is obtained while maintaining a greater short-circuit safety operation area (SCSOA).

Description

technical field [0001] A carrier storage trench gate IGBT structure with a P-type floating layer belongs to the technical field of semiconductor power devices. Background technique [0002] The insulated gate bipolar transistor is a rapidly developing and widely used power electronic device. It is a new device that combines the advantages of high input impedance of MOSFET, simple driving circuit, high current density of bipolar transistor and reduced saturation voltage. Now it is widely used in induction cooker, UPS uninterruptible power supply, automotive electronic igniter, frequency converter, motor drive system and other energy conversion devices. [0003] The IGBT was originally proposed in 1982 and is a punch-through structure, such as figure 1 shown, it is at high concentrations of P + N-type buffer layers 3 and N are sequentially epitaxially grown on the substrate 2 - The insulated gate bipolar transistor structure fabricated after the base layer 4 . Due to the ...

Claims

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Application Information

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IPC IPC(8): H01L29/739H01L29/423H01L29/06
Inventor 李泽宏马荣耀张波王蓉
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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