Metal-oxide-semiconductor transistor and method of manufacturing the same

Abstract

The invention discloses a manufacturing method of metal oxide semiconductor transistors. This method includes following steps. It first provides a basement. Then, the material layer with the gate structure is formed on the basement. Later, the carbon-containing precursor gas and the reaction gas are pumped to form the carbon-containing mask material layer on the material layer with gate structure. Then, both carbon-containing mask material layer and the gate structure material layer are graphically modeled to form carbon-containing hard mask layer and gate structure. After that, the clearance wall is formed on the side wall of the gate structure and carbon-containing hard mask layer. Subsequently, the protective layer is formed on the basement. Then, some protective layer is removed to expose part of the surface of the substrate. Then, doping epitaxial layer is formed on the exposed surface of the basement formed.

Description

technical field [0001] The invention relates to a semiconductor element and a manufacturing method thereof, in particular to a metal oxide semiconductor transistor and a manufacturing method thereof. Background technique [0002] Metal-oxide-semiconductor transistors are extremely important components in VLSI circuits at present, and their applications are very wide, such as microprocessors, semiconductor storage elements, power elements, etc., can be used as metal-oxide-semiconductor transistors basic building block. [0003] In a general nanoscale process, in order to increase the device performance of metal oxide semiconductor transistors, trenches are first formed in the substrate on both sides of the gate structure, and then the epitaxial process will produce strained semiconductor materials (such as SiGe, SiC ) is filled in the trench as a source / drain region to increase the mobility of electrons or holes in the channel. [0004] The current method of applying strain...

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Problems solved by technology

[0005] However, part of the hard mask covering the gate structure will be removed during the etching process for forming spacers and trenches, removing the patterned photoresist layer in the photolithography process, and the pre-cleaning process. layer, making the surface of the gate structure easily exposed

Therefore, when a doped epitaxial layer is formed in the trench in the subsequent epitaxial process, an epitaxial layer, that is, a so-called polysilicon bump, will be formed on the surface of the exposed gate structure, which seriously affects the reliability of the process. and component performance

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