66results about How to "Reduce the number of outputs" patented technology

An improved method of monitoring the output power provided by a switch mode power converter that reduces the overall cost of the converter. The method includes initiating a soft-start procedure for a first output voltage in the event the first voltage channel is enabled. When the first voltage level comes within regulation, a delay counter counts a predetermined number of clock cycles. In the event a second output voltage channel is enabled between the time the first channel is enabled and the time the first voltage comes within regulation, a soft-start procedure is initiated for the second voltage and the delay counter re-starts when the second voltage comes within regulation. After the delay counter finishes counting, the first and second voltages are considered stable and a single Power-Good signal is asserted. In the event one of the channels is disabled by a user while the other channel remains enabled, the disabled channel is ignored and the PGOOD signal stays asserted to indicate that the power provided by the converter on the enabled channel is good.

In a semiconductor memory device for reading out multilevel data in a time-shared manner at different timings, by providing plural control signal lines for controlling the operation timings of the output buffer circuits, the operation timings of output buffer circuits can be displaced, and the number of output buffer circuits operating simultaneously can be decreased, with the result that noise is reduced. Besides, by allowing the output buffer circuit, which outputs data read out early in a time-shared manner, to operate at an early timing, data output is terminated without retarding the operation timing of the output buffer circuit operating at the last timing.

A OLED display and a driving method thereof are disclosed. The OLED display includes: an OLED display panel including: data lines to which data voltages are supplied; gate lines to which a gate voltage is sequentially supplied; luminescence control lines to which a luminescence control voltage is sequentially supplied, a driving power line to which a driving voltage is supplied; a compensation power line to which a compensation voltage having a first level and a second level different from the first level are supplied; a plurality of pixel cells each respectively in pixel areas defined by the data lines and the gate lines; a data driver having output lines whose number is smaller than the number of the data lines; and a demultiplexer unit formed between the data driver and the OLED display panel, the demultiplexer unit supplying the data voltages from the output lines to the data lines, wherein each of the pixel cells includes: a light emitting element; and a pixel driver that supplies a current corresponding to a corresponding one of the data voltages to the light emitting element based on the corresponding data voltage, the gate voltage, the luminescence control voltage, the driving voltage and the compensation voltage having the first level and that turns off the light emitting element when the compensation voltage has the second level.

A display device including pixels has formed therein at least two driving blocks each made up of pixel rows, and includes: a signal line driving circuit that outputs a signal voltage to an output line disposed in each of pixel columns; and a selector circuit that provides a signal voltage outputted from the output line to one of a first signal line and a second signal line which are provided in each of the columns, provides a standard voltage from a standard voltage source to one of the two signal lines, and provides the signal voltage and the standard voltage mutually exclusively to the two signal lines. Each of the pixels includes a current control unit and an organic EL element. Pixels in the k-th driving block are connected to the first signal line and pixels in the (k+1)-th driving block are connected to the second signal line.

An apparatus and method of training a convolutional neural network (CNN) are provided. A method of training a CNN including a plurality of convolution layers stored in a memory involves approximating, using a processor, a convolution layer among the plurality of convolution layers using a low-rank approximation; reducing the number of output reconstruction filters of the approximated convolution layer; and modifying a structure of the CNN based on an approximation result and the reduced number of output reconstruction filters.