46results about "Network simulating negative resistances" patented technology

An unconditionally stable on-chip filter includes a filtering section and at least one negative resistance module. The filtering section is operably coupled to filter a signal and includes realizable integrated circuit passive components. The at least one negative resistance module is operably coupled to compensate for integrated circuit losses of the filtering section. The realizable integrated circuit passive components have values that are robust, in comparison to parasitic values, have minimal integrated circuit real estate, and provide realizable values for various integrated circuit manufacturing processes including CMOS technology.

A notch filter suitable for attenuating certain frequencies of a radio-frequency signal includes an input for receiving the radio-frequency signal and an output for the output of a portion of the radio-frequency signal, first and second capacitive means, at least one inductor and a negative resistance circuit suitable for compensating the resistive losses of said at least one inductor. The inductor and the first and second capacitive means are placed to produce a resonator and the filter comprises a control device suitable for controlling the negative resistance circuit. The input impedance of the filter comprises a pole and a zero, with the pole depending on the second capacitive means and the zero depending on both the first and second capacitive means. The first and second capacitive means are variable and the control device is suitable for controlling the first and second capacitive means.

The present invention provides an improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising a dual output current conveyer based inductor having one grounded terminal, a capacitor connected across the second terminal of said inductor, a resistor having one terminal connected to the second terminal of said inductor, the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and a pair of dual output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

An improved measurement circuit includes a current transformer and an active feedback circuit operated as a negative resistance that matches the value of the winding resistance of the current transformer. An amplifier in the feedback circuit provides power to drive a secondary current through a sense resistor and the transformer winding resistance, reducing the most significant error source in a current transformer circuit by presenting a negative impedance to the current transformer. Combined with the positive resistance of the transformer's winding, the negative impedance results in a net burden of zero on the current transformer, which eliminates the need for the transformer having to provide power to drive the secondary current. This facilitates the use of smaller transformers while achieving reduced measurement errors. Thus, a single, compact measurement device may be used in a wide range of applications with high measurement performance.

The present invention provides an improved Chua's circuit providing current mode operation, access to all state variables, minimum use of grounded passive elements, and freedom from passive component matching comprising a dual output current conveyer based inductor having one grounded terminal, a capacitor connected across the second terminal of said inductor, a resistor having one terminal connected to the second terminal of said inductor, the second terminal of said resistor connected to one terminal of a second capacitor the other end of which is grounded, and a pair of dual output current conveyers connected together to form a 2-terminal negative resistance having one terminal connected to ground and the second terminal connected to the second terminal of said resistance.

There is disclosed an impedance circuit which realizes negative impedance with ease, and a power supply device having negative output impedance. An impedance circuit 1 connected to an external circuit comprises: a current inverter circuit 11 having an input terminal connected to outside; a passive circuit 10 having an input terminal connected to an output terminal of the current inverter circuit 11; and a current inverter circuit 12 having an input terminal connected to an output terminal of the passive circuit 10 and an output terminal connected to outside. The current inverter circuits 11 and 12 work in cooperation with each other, to make magnitude of impedance of the impedance circuit 1 proportional to impedance of the passive circuit 10, and to invert the polarity of the impedance of the impedance circuit 1.

A Q enhancement circuit and method. In a most general embodiment, the inventive circuit is adapted for use with a component having a parasitic resistance R3 and a first resistance R1 disposed in series with the component and an arrangement for making the resistance a negative resistance. In the illustrative embodiment, first and second inductors constitute the components for which Q enhancement is effected. A resistance R1 is disposed in series with the first inductor and is equal to the parasitic resistance RL1 thereof. Likewise, a second resistance R2 is disposed in series with the second inductor and is equal to the parasitic resistance RL2 thereof. The Q enhancement circuit further includes a first transistor Q1 and a second transistor Q2.

A circuit for synthesising a negative resistance, comprising first and second active devices, the first device having a control terminal connected to a first node, and the second device having a current flow terminal connected to the first node, and the first and second devices interacting with each other such that the circuit synthesises a negative resistance.

The invention relates to a selective active low-pass filter and to a method for improving the selectivity of such a filter. The method consists in centring, in the centre of the network, the resonant element whose frequency is closest to the cut-off frequency of the filter and in inserting in series with this element a negative resistance of higher value than the parasitic resistance of the filter.

A notch filter suitable for attenuating certain frequencies of a radio-frequency signal includes an input for receiving the radio-frequency signal and an output for the output of a portion of the radio-frequency signal, first and second capacitive means, at least one inductor and a negative resistance circuit suitable for compensating the resistive losses of said at least one inductor. The inductor and the first and second capacitive means are placed to produce a resonator and the filter comprises a control device suitable for controlling the negative resistance circuit. The input impedance of the filter comprises a pole and a zero, with the pole depending on the second capacitive means and the zero depending on both the first and second capacitive means. The first and second capacitive means are variable and the control device is suitable for controlling the first and second capacitive means.

A tuning circuit using a negative resistance circuit for compensating an equivalent series resistance component thereof is provided. The negative resistance circuit has simple circuit construction and design and adjustment thereof is easy. The tuning circuit comprises a series resonance circuit and a negative resistance circuit connected to the series resonance circuit in series. In the negative resistance circuit, a first transistor constitutes an inverse amplifier by providing a resistor in an emitter circuit thereof and a second transistor constitutes an emitter follower circuit. A positive feedback circuit is constituted by feeding back an output of the emitter follower circuit to an emitter circuit of the first transistor and a negative feedback circuit is constituted by feeding back an output terminal to a base circuit of the first transistor. Thus a negative resistance is produced between this base input terminal and an earth. In this case, since a desired negative resistance value is obtained by adjusting a feedback quantity of both the feedback circuits, Q of the tuning circuit can be set to a desired value.

A circuit for synthesising a negative resistance, comprising first and second active devices, the first device having a control terminal connected to a first node, and the second device having a current flow terminal connected to the first node, and the first and second devices interacting with each other such that the circuit synthesises a negative resistance.

A resonance circuit includes a first resonator, a second resonator, a capacitance element and an inverting amplifier, and a negative capacitance circuit. The second resonator is connected to the first resonator in series. The capacitance element and the inverting amplifier are connected to one another in series. The capacitance element and the inverting amplifier are connected to the first resonator in parallel. The negative capacitance circuit is connected between a node and ground. The node is disposed between the first resonator and the second resonator.

A Q enhancement circuit and method. In a most general embodiment, the inventive circuit is adapted for use with a component having a parasitic resistance R3 and a first resistance R1 disposed in series with the component and an arrangement for making the resistance a negative resistance. In the illustrative embodiment, first and second inductors constitute the components for which Q enhancement is effected. A resistance R1 is disposed in series with the first inductor and is equal to the parasitic resistance RL1 thereof. Likewise, a second resistance R2 is disposed in series with the second inductor and is equal to the parasitic resistance RL2 thereof. The Q enhancement circuit further includes a first transistor Q1 and a second transistor Q2.

A noise shaping and voltage gain filtering third order electrical circuit and method comprises at least one pair of input resistors; a Frequency Dependent Negative Resistance (FDNR) filter positioned in between the at least one pair of input resistors; a feedback resistor; and an amplifier operatively connected to the feedback resistor and the at least one pair of input resistors, wherein as an electrical signal is introduced to the electrical circuit, the FDNR filter is adapted to filter signal blockers out of the electrical signal prior to the electrical signal reaching the amplifier for signal amplification, wherein the FDNR filter does not contribute noise to a signal-to-noise ratio (SNR) of the electrical signal, and wherein a transfer function of the FDNR filter is substantially elliptical in shape.

An oscillation element that oscillates an electromagnetic wave includes a negative resistance element and a resonator including a first conductor and a second conductor, in which the negative resistance element and the resonator are arranged on a substrate, the negative resistance element is electrically connected to the first conductor and the second conductor, the first conductor and the second conductor are capacitively coupled to each other, and when a capacitance between the first conductor and the second conductor is set as C, an inductance of the first conductor and the second conductor is set as L1, a speed of the oscillated electromagnetic wave in vacuum is set as CC, a relative dielectric constant of the substrate is set as εr, and a diagonal line length of the substrate is set as d, a series resonant frequency f1 of the resonator satisfies f1=1 / {2π√(L1C)}, and f1<Co / [d·{(1+εr) / 2}].

The active microfilter is essentially composed of an active part, which comprises a sign inverter circuit composed of an operational amplifier (13), two resistances and the impedance to be adapted (12), and a passive part which comprises capacitors, coils and resistances. The active microfilter is arranged in an auto-installable device which comprises a circuit for supplying the active part; wherein the aim is to eliminate the reflections caused by line sections, without adaptation, which interfere with the correct operation of the network when accessing broadband with the VDSL2 standard.

Variations in the actual resistance of a target poly resistor in a semiconductor integrated circuit can be compensated for by using an active circuit that provides a negative resistance in parallel with the target resistor. This produces a tuned resistance that is closer to a desired resistance than is the actual resistance of the target resistor.

A noise shaping and voltage gain filtering third order electrical circuit and method comprises at least one pair of input resistors; a Frequency Dependent Negative Resistance (FDNR) filter positioned in between the at least one pair of input resistors; a feedback resistor; and an amplifier operatively connected to the feedback resistor and the at least one pair of input resistors, wherein as an electrical signal is introduced to the electrical circuit, the FDNR filter is adapted to filter signal blockers out of the electrical signal prior to the electrical signal reaching the amplifier for signal amplification, wherein the FDNR filter does not contribute noise to a signal-to-noise ratio (SNR) of the electrical signal, and wherein a transfer function of the FDNR filter is substantially elliptical in shape.

The invention relates to methods and apparatus that receive an integration result, receive logic states of data bits corresponding to the integration result, and perform a high-speed multiplication operation. Embodiments of the invention selectively multiply the integration result according to the logic states of the corresponding data bits. Advantageously, relatively large integration results corresponding to data bit transitions that do not include a change of logic states, such as logic 0 to logic 0 or logic 1 to logic 1, can be multiplied by zero (0). Relatively smaller integration results corresponding to integrations of data bit transitions including a change in logic states, such as from logic 0 to logic 1 or from logic 1 to logic 0, can be multiplied by one (1) and by negative one (-1).

A system and method are provided for isolating an input without adding significant distortion and without significantly adversely affecting the bandwidth of input circuits. In one embodiment, a single ended signal is substantially cancelled by an arrangement including an input resistance path in parallel with a negative resistance path wherein both paths substantially match in resistance. In another embodiment, a differential signal is substantially cancelled by a pseudo differential arrangement including two independent input resistance paths each in parallel with a corresponding negative resistance path, wherein the resistance paths substantially match the input resistance paths. In yet another embodiment, a differential signal is substantially cancelled by a differential arrangement including two resistance paths wherein a first negative resistance path is coupled between the first differential input and the second differential output and the second negative resistance path is coupled between the second input and the first output. In yet another embodiment, a current controlled current source may provide the negative amplification for the negative resistance path.

A negative resistance circuit having a transistor and a plurality of distributed constant lines respectively connected to the three terminals of the transistor further comprises an inductive element or a capacitive element connected between the output terminal of the negative resistance circuit and the ground potential. The negative resistance is adjusted through the inductance of the inductive element or the capacitance of the capacitive element.

An element which oscillates or detects terahertz waves includes a resonance unit including a differential negative resistance element, a first conductor, a second conductor, and a dielectric body, a bias circuit configured to supply a bias voltage to the differential negative resistance element, and a line configured to connect the resonance unit and the bias circuit to each other. The differential negative resistance element and the dielectric body are disposed between the first and second conductors. The line is a low impedance line in a frequency fLC of resonance caused by inductance of the line and capacitance of the resonance unit using an absolute value of a differential negative resistance of the differential negative resistance element as a reference.

An oscillation element that oscillates an electromagnetic wave includes a negative resistance element and a resonator including a first conductor and a second conductor, in which the negative resistance element and the resonator are arranged on a substrate, the negative resistance element is electrically connected to the first conductor and the second conductor, the first conductor and the second conductor are capacitively coupled to each other, and when a capacitance between the first conductor and the second conductor is set as C, an inductance of the first conductor and the second conductor is set as L.sub.1, a speed of the oscillated electromagnetic wave in vacuum is set as C.sub.0, a relative dielectric constant of the substrate is set as .epsilon..sub.r, and a diagonal line length of the substrate is set as d, a series resonant frequency f.sub.1 of the resonator satisfies f.sub.1=1 / {2.pi. (L.sub.1C)}, and f.sub.1<C.sub.0 / [d {(1+.epsilon..sub.r) / 2}].

A vibration controller includes: a piezoelectric element fixed to an object of control; and a quasi-inductor circuit and a negative resistance circuit connected in series to the piezoelectric element.

An element which oscillates or detects terahertz waves includes a resonance unit including a differential negative resistance element, a first conductor, a second conductor, and a dielectric body, a bias circuit configured to supply a bias voltage to the differential negative resistance element, and a line configured to connect the resonance unit and the bias circuit to each other. The differential negative resistance element and the dielectric body are disposed between the first and second conductors. The line is a low impedance line in a frequency fLC of resonance caused by inductance of the line and capacitance of the resonance unit using an absolute value of a differential negative resistance of the differential negative resistance element as a reference.

Systems, apparatuses, and methods for implementing a negative resistance circuit for bandwidth extension are disclosed. Within a feedback path of a differential signal path, capacitors are placed on the inputs and outputs of a fully differential amplifier connecting to the differential signal path. In one embodiment, a circuit includes a fully differential amplifier and four capacitors. A first capacitor is coupled between a first signal path and a non-inverting input terminal of the amplifier and a second capacitor is coupled between the first signal path and a non-inverting output terminal of the amplifier. A third capacitor is coupled between a second signal path and an inverting input terminal of the amplifier and a fourth capacitor is coupled between the second signal path and an inverting output terminal of the amplifier. The first and second signal paths carry a differential signal.

The embodiment of the invention relates to a negative impedance circuit and corresponding equipment. The negative impedance circuit includes: a differential circuit stage; a positive feedback path from an output of the differential circuit stage to a first input of the differential circuit stage; and a negative feedback path from an output of the differential circuit stage to a second input of thedifferential circuit stage. The negative feedback path includes a first transistor, and a unity gain path from an output of the differential circuit stage to a second input of the differential circuit stage, the unity gain path coupled to ground via a reference impedance. The positive feedback path includes a second transistor. The first transistor and the second transistor are coupled in a current mirror arrangement and have respective control electrodes configured to be driven by an output of the differential circuit stage, where the negative impedance circuit induces a negative impedance at a first input of the differential circuit stage.