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Preparation method of TOPCon battery

A technology of batteries and silicon wafers, applied in circuits, electrical components, photovoltaic power generation, etc., can solve the problems of reducing process steps, achieve the effects of simplifying process steps, enhancing process controllability, and avoiding the risk of expansion

Active Publication Date: 2021-12-28
CHANGZHOU SHICHUANG ENERGY CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007]In terms of POLO structure preparation, since the intrinsic deposition rate is much higher than in-situ deposition, the same Poly Si thickness scheme ② has obvious advantages in production capacity, while scheme ① uses annealing for crystallization The crystallization process is simple and controllable, and there is no need to consider the risk of winding expansion. The dewinding plating treatment can be performed before crystallization to reduce the process steps, and there is no etching risk (BSG protection) for the front structure during the alkali polishing process. The two solutions are respectively in terms of production capacity and There are defects in process controllability

Method used

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preparation example Construction

[0035] The present invention provides a kind of preparation method of TOPCon battery, and its concrete steps comprise:

[0036] 1) Silicon wafer cleaning and texturing;

[0037] 2) Boron diffusion;

[0038] 3) Remove the back BSG;

[0039] 4) Alkaline polishing on the back;

[0040] 5) Prepare the tunnel oxide layer by LPCVD on the back side and deposit intrinsic amorphous silicon;

[0041] 6) Chain alkali polishing to remove the front amorphous silicon plating;

[0042] 7) Coating the liquid dopant on the back and drying: the front side of the silicon wafer can be placed flat on the carrier plate with negative pressure adsorption function and heating function, and the silicon wafer can be fixed on the carrier plate by negative pressure adsorption, and then on the The back of the silicon wafer is coated with a liquid dopant containing Group V elements (Group V elements are selected from one or more of N, P, As, Sb, and Bi), and then the dopant is dried by heating the carri...

Embodiment example

[0047] The specific implementation case of the present invention on the n-type TOPCon battery is as follows:

[0048] Select an n-type monocrystalline silicon wafer with a resistivity range of 0.8-1.5ohm.cm and a minority carrier lifetime >2.5 ms, with a thickness of 170µm and a size of 166mm;

[0049] In KOH and H 2 o 2 Remove the damaged layer on the surface of the silicon wafer in the mixed solution, and then perform texturing in the KOH solution to form a pyramid texture on the surface of the silicon wafer, and the size of the pyramid texture is controlled at 1-5 µm;

[0050] After the suede surface is completed, the emitter is prepared by B diffusion on the front of the silicon wafer, the square resistance is 110-150 ohm.cm, the thickness of the BSG on the front is 50-120nm, and the back of the silicon wafer is alkali-polished after removing the BSG, so that the reflectivity of the back of the silicon wafer is greater than 40 %;

[0051] Alkali polishing surface (backs...

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PUM

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Abstract

The invention discloses a preparation method of a TOPCon battery, which comprises the following steps of preparing a tunneling oxide layer on the back surface of a silicon wafer through LPCVD and depositing intrinsic amorphous silicon, firstly removing amorphous silicon winding plating on the front surface of the silicon wafer, then coating a liquid dopant on the back surface of the silicon wafer and drying, then annealing the silicon wafer, crystallizing the amorphous silicon through annealing and activating impurities. The method can realize single-sided diffusion without winding expansion, is a process scheme for preparing an n + POLO structure, meets the requirement of high productivity, optimizes a process window, avoids the winding expansion risk, can realize removal of amorphous silicon winding plating before annealing, simplifies process steps, protects the front surface structure of a silicon wafer, improves process controllability, and the contradiction between the diffusion concentration and the tunneling layer effect can be solved.

Description

technical field [0001] The invention relates to the field of photovoltaics, in particular to a method for preparing a TOPCon battery. Background technique [0002] In order to increase the proportion of photovoltaic power generation, cost reduction and efficiency improvement are the two main lines of photovoltaic manufacturing. At present, the mainstream photovoltaic cells are crystalline silicon solar cells. TOPCon technology is highly compatible with traditional PERC cell production lines and its The obvious efficiency gain has become one of the most potential new high-efficiency battery technologies, and its related research is increasing day by day. [0003] With the development and introduction of TOPCon battery technology, the conversion efficiency of industrialized n-type TOPCon batteries has exceeded 24%. The preparation of the n+ POLO structure is the core technology of the battery. There are currently two common preparation methods in the industry: ① thermal oxyge...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L31/18
CPCH01L31/1804H01L31/1864H01L31/1872Y02E10/547Y02P70/50
Inventor 任常瑞李金张佳舟蒋韦董建文符黎明
Owner CHANGZHOU SHICHUANG ENERGY CO LTD
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