Solar cell with composite dielectric passivation layer structure and preparation process thereof
A technology of solar cells and preparation process, which is applied in the field of PERC solar cells, can solve the problems of easily damaged passivation film layer, increased manufacturing cost, and decreased electrical performance, so as to improve the stability and reliability of anti-light decay and anti-PID performance, increase short-circuit current and open-circuit voltage, and enhance the effect of comprehensive utilization
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[0072] A preparation process for a solar cell with a composite dielectric passivation layer structure, in which a silicon oxide film 3 and an aluminum oxide film 2 are sequentially deposited on the front, back and peripheral surfaces of a P-type silicon substrate, and the front aluminum oxide film 2 is washed away and deposited Higher n-value silicon nitride or silicon oxynitride film 12, and then deposit low n-value silicon nitride film 1 on both sides and the periphery to form a laminated composite dielectric passivation layer, and laser doping on the front side to form N++SE The heavily doped area 10 is matched with the Ag positive electrode 6 printed and penetrated through the passivation film layer, and a window is partially opened on the back side for electrode derivation. The specific steps are as follows:
[0073] S1. Removing the damaged layer and making texture: pre-clean and texture the P-type silicon substrate 4, remove the damaged layer 3-5um on the surface of the ...
Embodiment 1
[0091] The present invention comprises the following specific steps:
[0092] (1) Remove the mechanical damage layer 4um on the surface of the single crystal P-type silicon substrate 4 with a NaOH solution with a concentration of 40g / L, clean the silicon chip surface, and simultaneously anisotropize the silicon chip surface with 18g / L NaOH liquid Corrosion, forming 2-3um inverted pyramid suede texture;
[0093] (2) In the diffusion furnace tube, POCl is used 3 Negative pressure diffusion of liquid source forms P-N junction, diffusion temperature is 830°C, process time is 55min, diffusion sheet resistance is controlled at 130-150ohm / port;
[0094] (3) Laser SE doping: On the diffused silicon wafer, the phosphorous atoms on the diffused surface phosphosilicate glass are laser doped by 5.6% in the subsequent screen-printed main grid and fine grid electrode areas, Form a local heavily doped region, the dense diffusion region sheet resistance 70-80ohm / ㎡;
[0095] (4) Using HF: H...
Embodiment 2
[0108] The present invention comprises the following specific steps:
[0109] (1) remove the mechanical damage layer 3.5um on the surface of the single crystal P-type silicon substrate 4 with a concentration of 30g / L NaOH solution, clean the silicon chip surface, and simultaneously use 20g / L of NaOH liquid to this silicon chip surface Anisotropic corrosion, forming 3-4um inverted pyramid suede texture;
[0110] (2) In the diffusion furnace tube, POCl is used 3 The liquid source is diffused under negative pressure to form a P-N junction, the diffusion temperature is 850°C, the process time is 45 minutes, and the diffusion sheet resistance is controlled at 140-170ohm / port;
[0111] (3) Laser SE doping: On the diffused P-type silicon substrate 4, the phosphorus atoms on the diffused surface phosphosilicate glass are laser doped in the subsequent screen-printed main grid and fine grid electrode regions by laser. Doping 5.2%, forming a local heavily doped region, the sheet resist...
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