Metal oxide semiconductor device and manufacturing method thereof

Abstract

The invention discloses a metal oxide semiconductor device and a manufacturing method thereof. The method comprises: forming an N-type MOSFET region and a P-type MOSFET region on a substrate; forming an ultra-thin gate interface oxide layer; forming a ferroelectric material gate dielectric layer, Barrier metal layer and polysilicon dummy gate layer and hard mask; form gate stack structure, gate spacer, N-type and P-type source / drain extension regions and their source / drain regions; deposit oxide and nitride The silicon interlayer dielectric layer is planarized; the first metal gate layer is deposited after removing the dummy polysilicon gate; the first metal gate is doped respectively; and the second metal gate layer is deposited. The metal oxide semiconductor device is finally annealed, which not only makes the interface form a dipole and adjusts the effective work function; but also the clamping effect of the metal electrode during the annealing process induces the generation of ferroelectric negative capacitance effect, which amplifies the surface potential of the channel , resulting in devices with ultra-steep subthreshold slopes and enhanced on / off current ratios.

Description

technical field [0001] The disclosure belongs to the technical field of semiconductors, and relates to a metal oxide semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous shrinking of the feature size of CMOS devices and the continuous improvement of integration, the power consumption of integrated circuit chips is also increasing. However, because the MOS transistor is based on the hot carrier diffusion conduction mechanism, it cannot overcome the Boltzmann limit, that is, the subthreshold slope (SS) of the device cannot be less than 60mV / dec at room temperature. Limited by the subthreshold swing, if the threshold voltage (V T ), will result in off-state leakage (I OFF ) increases exponentially, so that the leakage power consumption of the device rises linearly. Therefore, the Boltzmann theory limits the operating voltage of the device and cannot be further reduced as the feature size of the device shrinks. Integrated c...

AI Technical Summary

Problems solved by technology

In the traditional field effect transistor, C S and C ins are all positive, resulting in (1+C S / C ins ) can never be less than 1, so it cannot be less than 60mV / dec. The negative capacitance effect of ferroelectric materials can make the ferroelectric capacitance negative, that is, C F <0

Images