A method to reduce the ohmic contact resistance of gan HEMT devices

A technology of ohmic contact and resistance, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, circuits, etc. It can solve the problems of difficult reduction of resistivity and ohmic contact resistance, so as to reduce ohmic contact resistance, reduce alloy temperature, and improve devices Effect of Contact Resistivity

Active Publication Date: 2018-08-14
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention proposes a method for reducing the ohmic contact resistance of GaN HEMT based on nano-micropore technology, which is effective for the problem that the ohmic contact resistivity of traditional GaN HEMT is not easy to reduce, and the alloy temperature is too high to easily reduce the contact metal surface and edge morphology. Reduce the ohmic contact resistance of GaN HEMT devices, and improve the surface and edge morphology of ohmic contact metals, and are widely used in the development and production of various GaN HEMT devices

Method used

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  • A method to reduce the ohmic contact resistance of gan HEMT devices
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  • A method to reduce the ohmic contact resistance of gan HEMT devices

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preparation example Construction

[0023] (2) Preparation of composite medium layer;

[0024] (3) Fabrication of Ni nanomask in ohmic region;

[0025] (4) Ni nanomask / SiO 2 Fabrication of nanopillars;

[0026] (5) Transfer of nanopillar pattern to Si 3 N 4 on the mask;

[0027] (6) The formation of micropores in the barrier layer and channel layer region;

[0028] (7) Evaporation / stripping / annealing to form ohmic contacts.

[0029] Attached below Figure 2-1~Figure 2-9 , further describe the technical scheme of the present invention:

[0030] (1) On the GaN heterojunction material formed by AlGaN barrier layer 2 / GaN channel layer 1, 100 nmSi was grown by PECVD 3 N 4 3 and 100nm SiO 2 4 Composite dielectric layers, such as diagram 2-1 shown;

[0031] (2) Coat a layer of AZ7908 photoresist on the sample by spinning glue and pre-baking, and define the source and drain regions through photolithography exposure, development and post-baking processes, and use electron beam evaporation equipment to evap...

Embodiment 1

[0040] Reducing the ohmic contact resistance of GaN HEMT devices based on nano-micropore technology includes the following steps:

[0041] (1) The channel layer 1 of a GaN heterojunction material with a two-dimensional electron gas is GaN, AlGaN or InGaN material, and the barrier layer 2 is grown on a material containing AlGaN, InAlN or AlN 3 N 4 3 and SiO 2 4 composite dielectric layers; the Si 3 N 4 3 and SiO 2 4 Dielectric materials can be grown by PECVD, sputtering and thermal evaporation, among which Si 3 N 4 3 and SiO 2 4 The thickness of the medium is 50nm, Si 3 N 4 3 The etching rate of materials in buffered hydrofluoric acid solution is higher than that of SiO 2 4 The material should be more than 5 times lower;

[0042] (2) Use photolithography to define the ohmic region, evaporate a thin layer of Ni metal 5 in the ohmic contact region, and use the metal lift-off process to peel off the thin Ni metal 5 in the ohmic region; the thickness of the thin N...

Embodiment 2

[0050] Reducing the ohmic contact resistance of GaN HEMT devices based on nano-micropore technology includes the following steps:

[0051] (1) The channel layer 1 of a GaN heterojunction material with a two-dimensional electron gas is GaN, AlGaN or InGaN material, and the barrier layer 2 is grown on a material containing AlGaN, InAlN or AlN 3 N 4 3 and SiO 2 4 composite dielectric layers; the Si 3 N 4 3 and SiO 2 4 Dielectric materials can be grown by PECVD, sputtering and thermal evaporation, among which Si 3 N 4 3 and SiO 2 4 The thickness of the medium is between 50nm and 200nm, Si 3 N 4 3 The etching rate of materials in buffered hydrofluoric acid solution is higher than that of SiO 2 4 The material is more than 6 times lower;

[0052] (2) Use photolithography to define the ohmic region, evaporate a thin layer of Ni metal 5 in the ohmic contact region, and use the metal lift-off process to peel off the thin Ni metal 5 in the ohmic region; the thickness of...

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Abstract

The invention is a method for reducing the ohmic contact resistance of a GaN HEMT device, including 1) growing a Si3N4 and SiO2 composite dielectric layer on a GaN heterojunction material; 2) evaporating and stripping a thin layer of Ni in the ohmic region; 3) making Ni metal nanoclusters and Etching of SiO2 dielectric layer; 4) Fabrication of photoresist mask layer; 5) Oxygen plasma etching of photoresist mask layer; 6) Etching of Si3N4 and SiO2 composite dielectric layer; 7) Fabrication of GaN heterojunction micropores ;8) Evaporation / stripping / annealing to form ohmic contacts. The invention solves the problems of high resistivity and poor metal appearance of GaN ohmic contact, and has the advantages of (1) reducing the temperature of ohmic alloy and improving the surface and edge morphology of ohmic metal; (2) the size of the microchannel is controlled by nano-dots , the size can reach the nanometer level, no electron beam process is required, and the process takes less time; (3) The advantage of low ohmic contact resistance can be obtained.

Description

technical field [0001] The invention relates to a method for reducing the ohmic contact resistance of a GaN HEMT (high electron mobility transistor) device by using nano-micropore technology on a GaN (gallium nitride) material, and belongs to the technical field of semiconductor device preparation. technical background [0002] GaN HEMT devices have the characteristics of high withstand voltage, high output power density, high temperature resistance, and high operating frequency, and have important application values ​​in communication, radar detection, and power management. The performance of ohmic contacts has a great influence on the performance of GaN HEMT devices. Reducing the ohmic contact of GaN HEMT devices and improving the surface and edge morphology of ohmic contacts are crucial to improving the performance of GaN HEMT devices. To this end, a variety of technologies have been developed to improve the ohmic contact of GaN HEMTs, including low-temperature ohmic con...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28B82Y40/00H01L29/778H01L29/20
CPCH01L21/28H01L29/2003H01L29/66431H01L29/778
Inventor 周建军孔岑郁鑫鑫
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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