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Compressive-strain Si PMOS device based on channel crystal orientation selection and preparation method thereof

A technology of crystal orientation selection and compressive strain, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as poor hole mobility enhancement effect, improve current drive and frequency characteristics, and improve processing capacity Effect

Active Publication Date: 2017-12-22
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the overall hole mobility is improved under stress, the "offset" part leads to "poor" hole mobility enhancement effect

Method used

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  • Compressive-strain Si PMOS device based on channel crystal orientation selection and preparation method thereof
  • Compressive-strain Si PMOS device based on channel crystal orientation selection and preparation method thereof
  • Compressive-strain Si PMOS device based on channel crystal orientation selection and preparation method thereof

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Effect test

Embodiment 1

[0059] See figure 2 , figure 2 A process flow chart of a compressively strained SiPMOS device based on channel orientation selection provided by an embodiment of the present invention. The method comprises the steps of:

[0060] Step a, selecting a single crystal Si substrate whose crystal plane is (001);

[0061] Step b, growing a relaxed SiC epitaxial layer on the surface of the single crystal Si substrate;

[0062] Step c, growing a strained Si layer on the surface of the relaxed SiC epitaxial layer;

[0063] Step d, continuously growing a gate dielectric layer and a gate layer on the surface of the strained Si layer, and etching the gate layer and the gate dielectric layer by an etching process to form a gate;

[0064] Step e, using a self-alignment process to perform P-type ion implantation on a device surface different from the gate region to form a source and a drain;

[0065] Step f, forming the compressively strained SiPMOS device based on channel orientation s...

Embodiment 2

[0085] See Figure 5a-Figure 5l , Figure 5a-Figure 5l A process schematic diagram of a compressively strained Si PMOS device based on channel orientation selection is provided for an embodiment of the present invention. On the basis of the above embodiments, this embodiment will introduce the process flow of the present invention in more detail. The method includes:

[0086] S101. Substrate selection. Such as Figure 5a As shown, select 2um thick monocrystalline silicon (Si) substrate sheet 001 as initial material;

[0087] S102. Epitaxial layer growth:

[0088] S1021, such as Figure 5b As shown, a relaxed carbon-silicon epitaxial layer 002 with a thickness of 150-200 nm is grown by molecular beam epitaxy (MBE), and the carbon composition is about 1.30%-2%. The growth temperature is about 575-675°C, and the flow rate of the gas source is as follows: H 2 About 150ml / min, NPS about 50ml / min, SiCH 6 About 1ml / min;

[0089] S1022, such as Figure 5c As shown, a 10-20nm s...

Embodiment 3

[0103] The present invention also provides a compressively strained Si PMOS device based on channel orientation selection, which includes: a single crystal Si substrate layer, a relaxed SiC epitaxial layer, a strained Si layer, a gate dielectric layer, a metal gate layer, and a BPSG dielectric layer and a SiN layer; wherein, the PMOS device is formed by the method described in the above-mentioned embodiment.

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Abstract

The invention relates to a compressive-strain Si PMOS device based on channel crystal orientation selection and a preparation method thereof. The preparation method comprises the following steps: selecting a single-crystal Si substrate with a (001) type crystal plane; growing a relaxed SiC epitaxial layer on the surface of the single-crystal Si substrate; growing a strained Si layer on the surface of the relaxed SiC epitaxial layer; growing a gate dielectric layer and a gate layer on the surface of the strained Si layer continuously and etching the gate layer and the gate dielectric layer by using the etching process to form a gate; carrying gout P type ion implantation on the device surface different from a gate region by using a self-aligned process so as to form a source and a drain; and carrying out passivation processing on the device surface to form a compressive-strain Si CMOS device based on channel crystal orientation selection. Therefore, a problem of poor hole mobility enhancement effect of the biaxial strained Si material due to the traditional relaxed Si(1-x)Gex substrate is solved. The low-conductivity effective-quality [110] crystal orientation is used as biaxial strained Si / (001) Si(1- x)Cx PMOS channel orientation, so that the mobility ratio of the biaxial strained Si / (001) Si(1-x)Cx material and the performance of the device are improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a compressive strain SiPMOS device based on channel crystal orientation selection and a preparation method thereof. Background technique [0002] The semiconductor integrated circuit (IC) industry is a strategic, basic and leading industry for national economic and social development. It is the core and foundation for cultivating and developing strategic emerging industries and promoting the deep integration of informatization and industrialization. It is known as the global information industry. The "Pearl" in the crown. But at the same time, "Moore's Law", which has a huge impact on the development of the semiconductor industry, is facing a crisis. With the continuous reduction of device feature size, the development of microelectronics technology is getting closer and closer to the limit of materials, technology and devices, and is facing great challenges. [000...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/66053H01L29/78
Inventor 赵新燕宋建军苗渊浩胡辉勇宣荣喜张鹤鸣
Owner XIDIAN UNIV
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