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Ga2O3 material-based cap layer composite double-gate P-type metal-oxide-semiconductor field-effect transistor (PMOSFET) and preparation method thereof

A technology of composite double gate and capping layer, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems affecting the device performance of PMOSFET, insufficient hole transfer rate, Fermi pinning effect, etc., and achieve improvement Reliability, reduction of short channel effect, reduction of hot carrier effect

Active Publication Date: 2017-05-31
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The current third-generation wide-bandgap semiconductor material Ga 2 o 3 As a new research direction of semiconductor integrated circuit power devices and optoelectronic devices, MOSFETs of materials, but due to β-Ga 2 o 3 When the substrate is applied to high-speed devices, there are disadvantages such as insufficient hole transport rate and low thermal conductivity compared with other wide-bandgap materials. In addition, the metal gate / high-k gate dielectric structure is applied to Ga 2 o 3 The serious Fermi pinning effect appears on the substrate, which greatly affects the Ga 2 o 3 Device Performance of PMOSFET

Method used

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  • Ga2O3 material-based cap layer composite double-gate P-type metal-oxide-semiconductor field-effect transistor (PMOSFET) and preparation method thereof
  • Ga2O3 material-based cap layer composite double-gate P-type metal-oxide-semiconductor field-effect transistor (PMOSFET) and preparation method thereof
  • Ga2O3 material-based cap layer composite double-gate P-type metal-oxide-semiconductor field-effect transistor (PMOSFET) and preparation method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0061] See figure 1 , figure 2 , image 3 and Figure 4 , figure 1 A Ga-based 2 o 3 The first cross-sectional schematic diagram of the cap layer compound double-gate PMOSFET of the material (taken along the plane formed by the XY axis); figure 2 A Ga-based 2 o 3 The second cross-sectional schematic diagram of the cap layer composite double-gate PMOSFET of the material (taken along the plane formed by the ZY axis, and the viewing angle is: the direction of the drain electrode → the source electrode); image 3 A Ga-based 2 o 3 The third cross-sectional schematic diagram of the cap layer composite double-gate PMOSFET of the material (taken along the plane formed by the ZY axis, and the viewing angle is: the direction of the source electrode → the drain electrode); Figure 4 A Ga-based 2 o 3 The schematic top view of the composite double-gate PMOSFET with the cap layer of the material. The cap layer composite double-gate PMOSFET includes a gallium oxide mesa 1, a co...

Embodiment 2

[0081] Please also see Figure 6a-Figure 6l , Figure 13a-Figure 13b , Figure 14a-Figure 14b , Figure 15a-Figure 15b , Figure 16a-Figure 16b , Figure 17a-Figure 17b and 18a- Figure 18b , Figure 13a-Figure 13b A schematic structural diagram of a first mask set provided by an embodiment of the present invention; Figure 14a-Figure 14b A schematic structural diagram of a second mask set provided by an embodiment of the present invention; Figure 15a-Figure 15b A schematic structural diagram of a third mask set provided by an embodiment of the present invention; Figure 16a-Figure 16b A schematic structural diagram of a fourth mask set provided by an embodiment of the present invention; Figure 17a-Figure 17b A schematic structural diagram of a fifth mask set provided by an embodiment of the present invention; and Figure 18a-Figure 18b A schematic structural diagram of a sixth mask set provided by an embodiment of the present invention. On the basis of the above-men...

Embodiment 3

[0101] See Figure 7 , Figure 8 , Figure 9 and Figure 10 , Figure 7 Another Ga-based 2 o 3 The first cross-sectional schematic diagram of the cap layer composite double-gate PMOSFET of the material; Figure 8 Another Ga-based 2 o 3 The second cross-sectional schematic diagram of the composite double-gate PMOSFET of the cap layer of the material; Figure 9 Another Ga-based 2 o 3 The third cross-sectional schematic diagram of the cap layer composite double-gate PMOSFET; Figure 10 Another Ga-based 2 o 3 The schematic top view of the composite double-gate PMOSFET with the cap layer of the material. The composite dual-gate NPMOSFET includes: a gallium oxide mesa 1, a composite gate dielectric layer composed of a gate oxide layer 2 near the source end region and a gate oxide layer 3 near the drain end region, a capping layer 4, a double metal gate electrode 9, a source drain It consists of heavily doped regions 7, 8, source and drain heavily doped regions 11, 12, ...

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Abstract

The invention relates to a Ga2O3 material-based cap layer composite double-gate P-type metal-oxide-semiconductor field-effect transistor (PMOSFET) and a preparation method thereof. The method comprises the steps of selecting an N-type semi-insulation substrate, growing an N-type Beta-Ga2O3 layer by molecular beam epitaxy, and forming a table surface by dry etching; forming a source region and a drain region at two side positions of the table surface by an ion injection process; forming a source electrode and a drain electrode at two side positions near to the source region and the drain region; forming a first gate dielectric layer and a second gate dielectric layer at inclined surface positions of the other two sides, near to a source region side, of the table surface by a magnetron sputtering process; forming cap layers on surfaces of the first gate dielectric layer and the second gate dielectric layer; and forming gate electrodes on surfaces of the cap layers. Two materials with different dielectric constants are used as composite gate oxide layers to transmit holes and block electrons so as to improve the transmission efficiency; and the relatively thin cap layers are used, a dipole layer is formed at a gate oxide layer / Ga2O3 interface by a high-temperature process, thus, the adjustment of a band edge function is achieved, and the device reliability is improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, in particular to a Ga-based 2 o 3 Cap layer compound double-gate PMOSFET of material and its preparation method. Background technique [0002] MOS devices, that is, metal-oxide-semiconductor field effect transistors, have been completely different in structure and performance from the previous bipolar integrated circuits since their inception. MOS integrated circuits have high input impedance, strong anti-interference ability, low power consumption, The advantages of high integration and so on have become the mainstream of the VLSI era. MOS devices are divided into NMOS, PMOS, and CMOS according to different substrates and different conductive channels. Among them, MOS devices that use N-type substrates to form P-type channels are PMOS. [0003] PMOS is turned on after Vgs is less than a fixed value. The carrier that the current transmission of the device depends on is a hole, so i...

Claims

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Application Information

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IPC IPC(8): H01L29/51H01L29/66H01L29/78H01L21/336
CPCH01L29/513H01L29/517H01L29/66484H01L29/7831
Inventor 贾仁需张弘鹏元磊张玉明
Owner XIDIAN UNIV
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