Compound semiconductor corrosion method

A compound and semiconductor technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of slow etching rate, time-consuming and energy-consuming oxidation process, inability to achieve partial etching, etc., to reduce roughness , the effect of precise control of etching rate and depth

Inactive Publication Date: 2016-12-28
BEIJING DEFT ELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantages of this method are: it is only suitable for removing AlGaN, but cannot remove GaN; it is suitable for removing all AlGaN, and cannot achieve partial etching; and the oxidation process is time-consuming and energy-consuming.
The disadvantage of this method is that the etching rate is too slow

Method used

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  • Compound semiconductor corrosion method
  • Compound semiconductor corrosion method
  • Compound semiconductor corrosion method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0060] A kind of epitaxial wafer 1, the schematic diagram of its section structure is as figure 1 shown. The epitaxial wafer 1 includes a substrate 2 (sapphire substrate), a GaN buffer layer 3 (channel layer), a two-dimensional electron gas layer 4, an AlGaN barrier layer 5 (where the content of Al is adjustable) and a GaN buffer layer 5 from bottom to top. Layer 6.

[0061] The epitaxial wafer 1 is etched, and the etching method includes the following steps:

[0062] (1) Covering the mask layer 7 on the surface of the GaN layer 6, the material of the mask layer is selected from silicon oxide;

[0063] (2) Cover the photoresist layer on the surface of the mask layer 7, and obtain a patterned photoresist layer 8 by using a photolithography process;

[0064] (3) Obtaining a patterned mask layer by wet etching and / or dry etching;

[0065] (4) removing the patterned photoresist layer 8;

[0066] (5) Oxygen plasma generated by inductively coupled plasma-reactive ion etching sy...

Embodiment 2

[0081] An epitaxial wafer 1, which includes a substrate 2 (sapphire substrate), a GaN buffer layer 3 (channel layer), a two-dimensional electron gas layer 4 and an AlGaN barrier layer 5 from bottom to top.

[0082] The epitaxial wafer 1 is etched, and the etching method includes the following steps:

[0083] (1) covering the mask layer 7 on the surface of the AlGaN barrier layer 5, the material of the mask layer is selected from silicon nitride;

[0084] (2) Cover the photoresist layer on the surface of the mask layer 7, and obtain a patterned photoresist layer 8 by using a photolithography process;

[0085] (3) Obtain a patterned mask layer 7 by wet etching and / or dry etching;

[0086] (4) removing the patterned photoresist layer 8;

[0087] (5) Oxygen plasma generated by an inductively coupled plasma-reactive ion etching system is used to oxidize the exposed AlGaN barrier layer 5 to obtain an oxide layer 9, wherein, in the inductively coupled plasma-reactive ion etching sy...

Embodiment 3

[0091] A kind of epitaxial wafer 1, the schematic diagram of its section structure is as figure 1 shown. The epitaxial wafer 1 sequentially includes a substrate 2 (sapphire substrate), a GaN buffer layer 3, a two-dimensional electron gas layer 4, an AlGaN barrier layer 5 and a GaN capping layer from bottom to top.

[0092] The epitaxial wafer 1 is etched, and the etching method includes the following steps:

[0093] (1) covering the mask layer 7 on the surface of the GaN layer 6, the material of the mask layer is selected from aluminum;

[0094] (2) Cover the photoresist layer on the surface of the mask layer 7, and obtain a patterned photoresist layer 8 by using a photolithography process;

[0095] (3) Obtain a patterned mask layer 7 by wet etching and / or dry etching;

[0096] (4) removing the patterned photoresist layer 8;

[0097] (5) Oxygen plasma generated by inductively coupled plasma-reactive ion etching system is used to oxidize the exposed GaN layer 6 to obtain ox...

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Abstract

The invention provides a compound semiconductor corrosion method. The compound semiconductor corrosion method includes the following steps that 1, a compound semiconductor is covered with a patterned mask layer, wherein the compound semiconductor is a binary and / or multivariant group-III-V compound semiconductor; 2, a high-density plasma produced by a high-density plasma source to conduct oxidation treatment on the exposed compound semiconductor to obtain an oxidation layer, wherein the mask layer does not react with the high-density plasma; 3, the oxidation layer is removed; 4, the patterned mask layer is removed to obtain a corroded compound semiconductor. The method can rapidly and accurately control the etching rate and etching depth of the binary and / or multivariant group-III-V compound semiconductor, surface damages are few, no residue is produced, the etched surface is high in uniformity, and the compound semiconductor corrosion method can be used for formation of transistor recessed gates, ohmic contact structures and the like.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices, and relates to a method for etching compound semiconductors, in particular to a method for controlling the speed and accurately etching binary and / or multi-element III-V compound semiconductors. Background technique [0002] The AlGaN / GaN epitaxial structure is widely used in GaN-based HEMT (High Electron Mobility Transistor, high electron mobility transistor) devices and sensors. Typical AlGaN / GaN epitaxial structure cross-section as figure 1 As shown, the thickness of the AlGaN barrier layer is generally below 30nm. Usually there is a covering layer on the AlGaN, the composition is GaN, the covering layer is not a necessary structure, and the thickness is generally below 5nm. When the above-mentioned epitaxial structure is applied in a transistor or a sensor device, it usually needs to be completely or partially removed by etching, and the etching depth or speed needs to be prec...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3065
CPCH01L21/3065
Inventor 法比奥·圣阿加塔艾莉娜·耶尔沃利诺罗伯特·索科洛夫斯基董明智
Owner BEIJING DEFT ELECTRONICS TECH CO LTD
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