Corrosion method of semiconductor device side wall and semiconductor device made thereof

Abstract

The invention provides a method for raising a frequency characteristic of a common source operational amplifier. The method comprises the following steps: with regards to source electrode terminal upside, drain electrode terminal upside and grid upside, carrying out inclination insertion reactant plasma spacer film deposition so as to form spacer films, wherein, thickness of a grid spacer which is deposited on a grid side wall corresponding to drain electrode terminal upside is larger than thickness of a grid spacer which is deposited on a grid side wall corresponding to source electrode terminal upside; simultaneously carrying out etching on the spacer films corresponding to the source electrode terminal upside, the drain electrode terminal upside and the grid upside so as to expose a part which is corresponding to a first LDD structure of the drain electrode terminal and is used for forming the drain electrode terminal and a part which is corresponding to a second LDD structure of the source electrode terminal and is used for forming the source electrode terminal; respectively carrying out heavy doping and annealing process on the exposed parts of the first LDD structure and the second LDD structure to form heavily doped ion zones corresponding to the drain electrode terminal and the source electrode terminal.

Description

technical field [0001] The present application relates to the manufacture of semiconductor devices, more precisely, the present invention relates to a semiconductor device spacer etching method and semiconductor devices manufactured using the method. Background technique [0002] Complementary metal-oxide-semiconductor (CMOS) operational amplifiers are one of the building blocks of various circuits. With the development of information technology, the requirements for the processing speed of information data are getting higher and higher, and the requirements for the frequency response characteristics of the CMOS operational amplifiers used in it are also getting higher and higher. [0003] However, the parasitic capacitance of CMOS devices will produce more and more negative effects as the operating frequency increases. Therefore, how to reduce the influence of parasitic capacitance on CMOS operational amplifiers has become the key to improving the frequency response charact...

AI Technical Summary

Problems solved by technology

There is a parasitic overlapping capacitance C between the output terminal and the input terminal of the common-source operational amplifier, that is, between the gate terminal and the drain terminal of the NMOS device 2 gd , which forms a feedback capacitor, therefore, due to the Miller effect, the parasitic overlap capacitance C gd will seriously degrade the frequency response characteristics of this common-source op amp

Images