384 results about "Configuration space" patented technology

A system and method for registering combinations of physical and / or virtual functions for configuring an endpoint are provided. With the system and method, a mechanism informs a management component of a multifunction endpoint's functional combinations. The management component may then use this information to select the functional combinations that are to be made visible to each system image. The informing of the management component may be performed by writing values to various predefined fields in a configuration space for a physical or virtual function that provides information regarding the number of virtual functions supported, the combination of functions supported, a nominal combination of virtual functions to be used by the physical function, and a group identifier for identifying which functions are linked in a combination grouping.

A path planning apparatus of a robot smoothes a motion path while satisfying a constraint. In a configuration space where a manipulator of a robot performs a task, a Rapidly-exploring Random Tree (RRT) path which extends from a start point and reaches a goal point may be smoothed while satisfying a constraint to generate a stable motion path. Accordingly, path planning performance is improved and an optimal path satisfying a kinematic constraint may be rapidly obtained.

Disclosed is a mobile robot and method generating a path of the mobile robot, capable of quickly moving the mobile robot to a location at which the mobile robot is able to detect a docking station. A first configuration space map is built by expanding an obstacle area including an obstacle by a first thickness, and a second configuration space map is built by expanding the obstacle area by a second thickness which is less than the first thickness. A path is generated by sequentially using the first configuration space map and the second configuration space map.

In a distributed computer system having multiple root nodes, a challenge protocol is provided, for use in determining or confirming the root node in which a PCI Configuration Manager (PCM) actually resides. This node is referred to as the master node. The challenge procedure is activated whenever the identity of the PCM, which is determined by the root node in which it resides, appears to be uncertain. The challenge procedure resolves this uncertainty, and enables the PCM to continue to configure routings throughout the system. In a useful embodiment, a method is directed to a distributed computer system of the above type which is further provided with PCI switches and with adapters that are available for sharing by different nodes. The method includes the steps of selecting a first one of the root nodes to be master root node, and operating the first root node to query the configuration space of a particular one of the PCI switches. The method further includes detecting information indicating that a second root node is considered to be the master root node for the particular switch. A challenge protocol is implemented in response to this detected information, to seek confirmation that the first root node is the master root node. The configuration space querying procedure is continued if the first root node is confirmed to be the master root node, and is otherwise aborted.

A configuration space operation packet is received from a link. The configuration space operation packet is detected using a hardware mechanism. The configuration space operation packet is forwarded to a software-controlled entity for processing. A received packet can be detected as a configuration space operation packet from an address range of an address in a header of the received packet. The software-controlled entity can provide configuration space virtualisation.

Disclosed herein are a path planning apparatus and a method for a robot to plan an optimal path along which a manipulator of a robot moves to a goal point from a start point. An obstacle within a prescribed angle on a straight line connecting a start point and a goal point is recognized as a middle point in a configuration space and arbitrary points separated from the middle point by a prescribed distance are selected. Among the selected points, arbitrary points which can directly connect the start point and the goal point without passing the obstacle are selected as waypoints to map a new middle node. A path is extended via the middle node and extension of a tree in a wrong direction is minimized so that the manipulator is not struck at local minima without depending greatly on a goal score, thereby improving the performance of path planning and rapidly searching for a path.

Systems, devices, articles, and methods are illustrated and described herein. A method of operation in a robotic system including a processor, a first device, and a second device involves receiving, by the processor, a training set including a first plurality of positions in a first configuration space that represents physical configurations of the first device, a second plurality of positions in a second configuration space that represents physical configurations of the second device, and information that represents pairs of positions. A representative pair includes a first representative position in the first configuration space and a second representative position in the second configuration space. The method involves creating, by the processor, from the training set, information that represents a map between a first run-time position in the first configuration space, and a second run-time position in the second configuration space, and returning, by the processor, the information that represents the map.

A universal routing identifier (URID) is provided to extend the function space in PCI-Express fabrics. Methods and systems based on the URID are provided for configuring URID capable devices and upgrading PCI-Express bridges and switches having lookup tables with access control functionality. The lookup table entry contains URIDs of destination ports, backup ports, acceptance ports, and permitted ports for downstream and upstream filtering, routing and arbitrating of transaction packets. URID capable devices can be incrementally added to current PCI-Express bridges and switches. A configuration mechanism is added to the current PCI / PCI-Express enumeration software. The URID capabilities can be disabled to maintain system compatibility. A URID capable PCI-Express system is able to address ten of thousands single-function devices. A URID capability segment field is provided in the current PCI-Express configuration space. Each URID capable device contains the URID capability segment implemented in its own set of configuration space registers.

A method of registering a newly added peripheral device with a computer system by responding with a status message from the device to a bus of the computer system, in response to an access attempt, and within a predetermined time period from the deasserting of the reset signal applied to device, so as to avoid stalling and thereby avoid the need to reboot the system in order to initialize the new peripheral device with the operating system. The device may be allowed to initially send a retry response, provided the response occurs during an initial latency period which is less than the predetermined time period. The invention also enables the peripheral device to respond to non-configuration cycles immediately following configuration completion. Internal logic of the peripheral device can be initialized after responding with the status message. Non-configuration access to the peripheral device can be prevented until it is ready to respond, by setting a bit (in the configuration space of the peripheral device to indicate that the peripheral device is ready.

Disclosed are a path planning apparatus of a robot, which generates a path plan to control movements of the robot, and a method thereof. An improved RRT algorithm is employed, when a tree is extended in a configuration space so as to satisfy a constraint, and thus steeply bent or roundabout portions of the tree are reduced.

The invention refers to a method for controlling the effector trajectory from a current state to a target state. First invariant control parameters of the trajectory are determined. The effector trajectory is then represented in a task description being void of the invariant control parameters. The effector trajectory is controlled on the basis of this task description. The invention further refers to a method for controlling the effector trajectory wherein the effector trajectory is calculated by mapping increments from a control parameter space on a configuration space. The dimensional difference between the configuration space and the control parameter space leaves redundant degrees of freedom of a Null space. The degrees of freedom of the Null space are increased using a task description being void of invariant control parameters. The invention further refers to a respective computer software program product, a manipulator, an actuated camera system, a robot comprising one or more manipulators and an automobile equipped with a driver support system.

An embodiment of the present invention relates to a method for expanding a PCIe bus region, capable of allocating configuration space address to a PCIe device of an expanded region from memory address of an endpoint device of a root complex, establishing a corresponding relationship between the configuration space address and bus number / device number / function number (BDF), and allocating a bus number to the PCIe device found in the expanded region from a second bus assembly of the expanded region, wherein the bus number is used for determining the BDF of the PCIe device found in the expanded region, so that a configuration space register of the PCIe device found in the expanded region can be accessed through the BDF of the PCIe device found in the expanded region according to the corresponding relationship between the configuration space address and the BDF, in this way, expansion of the PCIe bus region is achieved, and the problem that expansion of the PCIe bus region cannot be performed in the prior art is solved, thus the number of the PCIe devices in a system cannot be limited by 256 buses.