Method of making a semiconductor chip assembly with a post/base heat spreader and horizontal signal routing

Abstract

A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate to form a gap in the aperture between the post and the substrate, then flowing the adhesive into and upward in the gap, solidifying the adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader. The substrate includes first and second conductive layers and a dielectric layer therebetween and provides horizontal signal routing between a pad and a terminal at the first conductive layer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a divisional of U.S. application Ser. No. 12 / 557,540 filed Sep. 11, 2009, which is a continuation-in-part of U.S. application Ser. No. 12 / 406,510 filed Mar. 18, 2009, which claims the benefit of U.S. Provisional Application Ser. No. 61 / 071,589 filed May 7, 2008, U.S. Provisional Application Ser. No. 61 / 071,588 filed May 7, 2008, U.S. Provisional Application Ser. No. 61 / 071,072 filed Apr. 11, 2008, and U.S. Provisional Application Ser. No. 61 / 064,748 filed Mar. 25, 2008, each of which is incorporated by reference.[0002]U.S. application Ser. No. 12 / 557,540 also claims the benefit of U.S. Provisional Application Ser. No. 61 / 150,980 filed Feb. 9, 2009, which is incorporated by reference.BACKGROUND OF THE INVENTION[0003]1. Field of the Invention[0004]The present invention relates to semiconductor chip assembly, and more particularly to a semiconductor chip assembly with a semiconductor device, a substrate, an adhesive and a...

AI Technical Summary

Benefits of technology

"The present invention provides a semiconductor chip assembly that includes a semiconductor device, an adhesive, a heat spreader, and a substrate. The adhesive is a thermally conductive adhesive that is used to connect the semiconductor device to the substrate and the heat spreader. The heat spreader includes a post and a base and is positioned between the semiconductor device and the substrate. The substrate includes a pad and a terminal, and the semiconductor device is electrically connected to the pad and thermally connected to the base. The heat spreader can provide heat dissipation and spreading from the semiconductor device to the next level assembly. The semiconductor device can be a packaged or unpackaged semiconductor chip, and the adhesive can be a thermally conductive adhesive or an epoxy-based adhesive. The technical effects of this invention include improved heat dissipation and reduced signal loss between the semiconductor device and the substrate."

Problems solved by technology

Semiconductor devices are susceptible to performance degradation as well as short life span and immediate failure at high operating temperatures.

The heat not only degrades the chip, but also imposes thermal stress on the chip and surrounding elements due to thermal expansion mismatch.

LEDs include high power chips that generate high light output and considerable heat.

Unfortunately, LEDs exhibit color shifts and low light output as well as short lifetimes and immediate failure at high operating temperatures.

Furthermore, LED light output and reliability are constrained by heat dissipation limits.

However, since the plastic and the dielectric layer typically have low thermal conductivity, the PBGA provides poor heat dissipation.

However, since the lead frame type interposer has limited routing capability, the QFN package cannot accommodate high input / output (I / O) chips or passive elements.

However, manually dropping the heat slug into the central opening is prohibitively cumbersome and expensive for high volume manufacture.

Furthermore, since the heat slug is difficult to accurately position in the central opening due to tight lateral placement tolerance, voids and inconsistent bond lines arise between the substrate and the heat slug.

The substrate is therefore partially attached to the heat slug, fragile due to inadequate support by the heat slug and prone to delamination.

The heat slug is therefore non-planar and difficult to bond to.

As a result, the assembly suffers from high yield loss, poor reliability and excessive cost.

However, the insulating layer sandwiched between the metal core layer and the PCB limits the heat flow to the PCB.

As a result, the heat spreader releases the heat by thermal convection rather than thermal conduction which severely limits the heat dissipation.

Consequently, the substrate is unbalanced and wobbles and warps during manufacture.

This creates enormous difficulties with chip mounting, wire bonding and encapsulant molding.

Furthermore, the expanded base may be bent by the encapsulant molding and may impede soldering the package to the next level assembly as the solder balls collapse.

As a result, the package suffers from high yield loss, poor reliability and excessive cost.

However, the electrical contacts are difficult to mount on the insulating layer, difficult to electrically connect to the next level assembly and fail to provide multi-layer routing.

Conventional packages and thermal boards thus have major deficiencies.

For instance, dielectrics with low thermal conductivity such as epoxy limit heat dissipation, whereas dielectrics with higher thermal conductivity such as epoxy filled with ceramic or silicon carbide have low adhesion and are prohibitively expensive for high volume manufacture.

The dielectric may delaminate during manufacture or prematurely during operation due to the heat.

The substrate may have single layer circuitry with limited routing capability or multi-layer circuitry with thick dielectric layers which reduce heat dissipation.

The heat spreader may be inefficient, cumbersome or difficult to thermally connect to the next level assembly.

The manufacturing process may be unsuitable for low cost, high volume manufacture.

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