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Single-sided texturing process of monocrystalline silicon wafer, and preparation method of solar cell

A monocrystalline silicon wafer, single-sided texturing technology, applied in the direction of single crystal growth, single crystal growth, chemical instruments and methods, etc., can solve the problem of poor passivation effect on the back of the battery sheet, unsatisfactory flatness of the back polished surface, Issues affecting the quality of monocrystalline PERC cells

Active Publication Date: 2020-11-17
CHINT NEW ENERGY TECH (HAINING) CO LTD
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0005] Single crystal texturing has been relatively perfect, and is widely used in various cell manufacturers. At present, there is still an unsatisfactory problem in the flatness of the back polishing surface in the second cleaning process, which leads to poor post-passivation effect of the cell, which seriously affects the single crystal PERC battery quality

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  • Single-sided texturing process of monocrystalline silicon wafer, and preparation method of solar cell

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preparation example Construction

[0051] The present invention also provides a method for preparing a solar cell, comprising the following steps:

[0052] 1) Prepare a phosphorous diffusion layer and a silicon dioxide tunneling layer sequentially on the front side of the above-mentioned front textured monocrystalline silicon wafer,

[0053] 2) depositing an aluminum oxide layer on the back side of the monocrystalline silicon wafer obtained in the step 1);

[0054] 3) depositing a silicon nitride layer with a thickness of 60 to 90 nm on the front side of the monocrystalline silicon wafer obtained in step 2);

[0055] 4) Depositing a silicon nitride layer with a thickness of 100-150 nm on the back side of the monocrystalline silicon wafer obtained in step 3)

[0056] 5) performing laser drilling on the back of the monocrystalline silicon wafer obtained in step 4), and then sintering the screen to obtain a solar cell.

[0057] The present invention carries out phosphorus diffusion on the textured surface (i.e. ...

Embodiment 1

[0068] Add resin, cellulose, additives, and nano-silica powder in a certain proportion, heat and stir at 60°C for 5 minutes, and prepare a solution-like colloid (mass ratio of silica powder: additive: cellulose: resin = 1:1:0.5: 15.

[0069] Place the P-type monocrystalline silicon wafer on the tray of the spin-coating instrument, drop mask glue on the back surface of the silicon wafer, and spin-coat to prepare a mask glue with a thickness of 2 μm;

[0070] For texturing, use potassium hydroxide solution for texturing, and use 10% HF aqueous solution to wash off the mask glue after texturing;

[0071] Phosphorus diffusion to obtain a phosphorus diffusion layer with a square resistance of 130Ω / □ to form an N+ emitter;

[0072] Use etching equipment to remove phospho-silicate glass and polish the back surface; since the back surface does not participate in the texturing reaction, no pyramid-like texture is formed, and the back surface is relatively flat compared with convention...

Embodiment 2

[0080] Add resin, cellulose, additives, and nano-silica powder in a certain proportion, heat and stir at 60°C for 5 minutes, and prepare a solution-like colloid (mass ratio of silica powder: additive: cellulose: resin = 0.5:1:0.5: 20.

[0081] Place the P-type monocrystalline silicon wafer on the tray of the spin-coating instrument, drop the mask glue on the back surface of the silicon wafer, and spin-coat to prepare a mask glue with a thickness of 1 μm;

[0082] For texturing, use potassium hydroxide solution for texturing, and use 10% HF aqueous solution to wash off the mask glue after texturing;

[0083] Phosphorus diffusion to obtain a phosphorus diffusion layer with a square resistance of 110Ω / □, forming an N+ emitter;

[0084] Use etching equipment to remove phospho-silicate glass and polish the back surface; since the back surface does not participate in the texturing reaction, no pyramid-like texture is formed, and the back surface is relatively flat compared with con...

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Abstract

The invention provides a single-sided texturing process of a monocrystalline silicon wafer. The process comprises the following steps of: A) coating the back surface of a monocrystalline silicon waferwith a mask glue solution to obtain a monocrystalline silicon wafer with a mask coating on the back surface, wherein the mask glue solution is prepared from the following components in parts by weight: 0.1 to 1 part of silicon oxide, 0.5 to 2 parts of an auxiliary agent, 0.1 to 1 part of lignin fiber and 10 to 100 parts of Arabic gum; and B) texturing the monocrystalline silicon wafer with the mask coating on the back surface in an alkaline reagent, then carrying out acid pickling, and removing the mask coating to obtain the monocrystalline silicon wafer with textured single surface. According to the method, silicon oxide and a resin are used as main components, and a mask coating can be prepared at a low temperature, so that the energy consumption is low, the resin and the silicon oxideplay a role in blocking and masking, the blocking effect is good, the silicon oxide plays a role in masking, and a dissolution assisting effect on subsequent mask removal is also achieved.

Description

technical field [0001] The invention belongs to the technical field of photovoltaic solar cells, and in particular relates to a single-side texturing process of a monocrystalline silicon chip and a preparation method of a solar cell. Background technique [0002] At present, batteries in the photovoltaic industry can be divided into crystalline silicon solar cells and thin-film solar cells according to different substrate materials. Among them, the development of crystalline silicon solar cells is relatively mature, and there is still a lot of room for improvement in cost and efficiency. It is the mainstream of the current market. The number of free electrons and holes that pure crystalline silicon can generate is far from meeting the needs of photovoltaic power generation. Therefore, the commonly used technology is to dope pure silicon, doping phosphorus in it to form an N-type semiconductor, in which Doping with boron element forms a P-type semiconductor. [0003] Current...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C30B33/10C30B29/06C23C16/50C23C16/34C30B31/00C23C16/455C23C16/40H01L31/0236H01L31/18
CPCC30B33/10C30B29/06C23C16/50C23C16/345C30B31/00C23C16/45525C23C16/403H01L31/1804H01L31/02366Y02E10/547Y02P70/50
Inventor 马玉超余浩张晓攀单伟何胜徐伟智
Owner CHINT NEW ENERGY TECH (HAINING) CO LTD
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