Low-voltage multifunctional charge trapping synaptic transistor and preparation method thereof

Abstract

The invention discloses a low-voltage multifunctional charge trapping type synaptic transistor and a preparation method thereof, and belongs to the field of synaptic devices oriented to neural networkhardware application. According to the invention, a silicon nitride and hafnium oxide double-capture-layer structure is adopted to simultaneously realize short-long-time synaptic plasticity on a single device, so that the functions of the synaptic device are enriched; a three-gate nanowire structure is beneficial to enhancing an interface electric field, so that the FN tunneling width at the interface is reduced, the tunneling probability at the interface is enhanced, and the operation voltage and the device power consumption are reduced; and the device has complete CMOS material and processcompatibility, and due to the excellent device characteristics, the device has potential to be applied to a future large-scale neural network computing system.

Description

technical field [0001] The invention relates to the field of neuromorphic computing systems, provides basic synaptic device units for building neuromorphic computing systems, and particularly relates to a charge-trapping synaptic transistor with the advantages of low power consumption, high reliability and good CMOS process compatibility. Background technique [0002] Neuromorphic computing is a new type of computing architecture that integrates storage and computing by simulating the computing model of a high-parallel, high-fault-tolerant, and energy-efficient biological neuromorphic system. The basis of the morphological computing system. For synaptic devices, a large number of synaptic devices have emerged, such as Resistive Random Access Memory (RRAM), Phase Change Random Access Memory (PCRAM), ion gate control Synaptic transistor (Ionic Gated Field-effect Transistor, IGFET) and charge trapping synaptic transistor (Charge Trapped Field-effect Transistor, CTFET), in which...

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Problems solved by technology

[0002] Neuromorphic computing is a new type of computing architecture that integrates storage and computing by simulating the computing model of a high-parallel, high-fault-tolerant, and energy-efficient biological neuromorphic system. The basis of the morphological computing system. For synaptic devices, a large number of synaptic devices have emerged, such as Resistive Random Access Memory (RRAM), Phase Change Random Access Memory (PCRAM), ion gate control Synaptic transistor (Ionic Gated Field-effect Transistor, IGFET) and charge trapping synaptic transistor (Charge Trapped Field-effect Transistor, CTFET), in which the charge trapping synaptic transistor has good CMOS process compatibility, high integration density and read The advantage of writing separation, but the current charge-trapping synaptic transistors have challenges such as single function and high operating voltage

[0003] Specifically, because CTFETs work based on a non-volatile charge-trapping mechanism, they can only simulate long-term synaptic plasticity, lacking the simulation of equally important short-term plasticity, and short-term plasticity play an important role in synaptic computing

[0004] On the other hand, charges need to tunnel through a relatively wide potential barrier during programming and erasing, so the operating voltage is high

[0005] In summary, synaptic transistors that operate at low voltage and can simultaneously achieve short- and long-term plasticity remain to be developed.

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