Semiconductor device and forming method thereof

Abstract

A semiconductor device and a forming method thereof are provided. The forming method includes the following steps: providing a substrate including an NMOS region, wherein an interlayer dielectric layer is formed on the substrate, and an N region opening penetrating the interlayer dielectric layer is formed in the interlayer dielectric layer of the NMOS region; forming a high-k gate dielectric layer on the bottom and sidewall of the N region opening; forming an N-type work function layer on the high-k gate dielectric layer; forming a diffusion barrier layer on the N-type work function layer; hydrogenating the diffusion barrier layer; and after hydrogenation, forming a metal gate filling the N region opening on the diffusion barrier layer. The ability of the diffusion barrier layer to protect the N-type work function layer is improved, and therefore, the electrical performance of a semiconductor device formed is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] The main semiconductor device of an integrated circuit, especially a very large scale integrated circuit, is a metal-oxide-semiconductor field effect transistor (MOS transistor). With the continuous development of integrated circuit manufacturing technology, the technology nodes of semiconductor devices are continuously reduced, and the geometric dimensions of semiconductor structures are continuously reduced following Moore's law. When the size of the semiconductor structure is reduced to a certain extent, various secondary effects caused by the physical limit of the semiconductor structure appear one after another, and it becomes more and more difficult to scale down the feature size of the semiconductor structure. Among them, in the field of semiconductor manufacturing, the ...

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Problems solved by technology

[0004] Although the introduction of high-k metal gates can improve the electrical properties of semiconductor structures to a certain extent, the electrical properties of semiconductor structures formed by existing technologies still need to be improved.

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