Electrostatic discharge protection circuit and manufacture method thereof

Abstract

The invention discloses an electrostatic discharge protection circuit and a manufacture method thereof. The manufacture method of the electrostatic discharge protection circuit includes the followingsteps that: a semiconductor substrate is provided, a well is formed in the semiconductor substrate; a gate is formed on the well; source and drain region implantation is performed in the well, so thatsource electrodes and drain electrodes are formed; and ESD (electrostatic discharge protection) implantation is performed on the drain electrodes through a specific mask, so that ESD implantation regions can be formed under the drain electrodes, the implantation dose of two end regions in each ESD implantation region is greater than that of a middle region in the corresponding ESD implantation region. According to the electrostatic discharge protection circuit and the manufacture method thereof of the invention, ESD implantation is performed through the specific mask, so that at least one ESDimplantation region is formed under the drain electrode; the implantation dose of the two end regions in the ESD implantation region is greater than that of the middle region in the ESD implantationregion; and therefore, the problem of inconsistency of the start of ESD in an existing electrostatic discharge protection circuit can be solved, and the electrostatic discharge protection capability of the electrostatic discharge protection circuit of the invention can be effectively improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to an electrostatic discharge protection circuit and a manufacturing method thereof. Background technique [0002] Integrated circuits are easily damaged by static electricity. Generally, an electrostatic protection circuit is designed in the input and output terminals of the circuit or in the power protection device to prevent the internal circuit from being damaged by static electricity. At present, GGNMOS (Gate Grounded NMOS, gate grounded N-type metal oxide semiconductor) is often used as an electrostatic discharge protection circuit. [0003] However, there are still some defects in the existing GGNMOS circuits, such as figure 1 As shown, it is a schematic cross-sectional view of the structure of the existing GGNMOS. A well (P-Well) is formed on the substrate (P-Substrate). In the NMOS region of the GGNMOS, the source S and the gate G are grounded, and the pickup reg...

AI Technical Summary

Problems solved by technology

This inconsistent ESD turn-on phenomenon reduces the ESD protection capability of GGNMOS, and at the same time leads to uneven heat distribution in the GGMOS circuit, which can easily cause premature aging of the device and reduce the service life of the integrated circuit.

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