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Formation method of fin field effect transistor

A fin field effect tube and fin technology, which is applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems that the electrical performance of the fin field effect tube needs to be improved, so as to improve the anti-penetration effect, avoid injection damage, electrical The effect of performance improvement

Inactive Publication Date: 2017-04-19
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology

[0005] However, the electrical performance of the fin field effect transistor formed by the prior art needs to be improved

Method used

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  • Formation method of fin field effect transistor
  • Formation method of fin field effect transistor
  • Formation method of fin field effect transistor

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Experimental program
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Embodiment Construction

[0020] It can be seen from the background art that the electrical performance of the fin field effect transistor formed in the prior art needs to be improved.

[0021]It has been found through research that the distance between the bottom of the fin and the gate structure of the fin field effect transistor is relatively long, the ability of the gate structure to control the bottom of the fin is weak, and the doping concentration of the fin is small, and the channel The space charge region of the area is widened under the electric field, and the space charge region of the source region and the drain region are connected, resulting in a punch through phenomenon between the source region and the drain region at the bottom of the fin field effect transistor, resulting in a fin field effect The electrical performance of the tube is low.

[0022] In order to prevent the punch-through phenomenon, a solution is proposed: forming an anti- punch-through layer at the bottom of the fin. ...

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Abstract

A formation method of a fin field effect transistor comprises the steps of providing a substrate, wherein fin parts are formed on the surface of the substrate, and the fin parts comprise a first fin part and a second fin part located on the top surface of the first fin part; forming a sacrificial layer on the surface of the substrate, wherein the surface of the side wall of the first fin part is also covered by the sacrificial layer; forming a side wall film covering the surfaces of the sacrificial layer and the second fin part; back etching the side wall film, and forming a side wall on the surface of the side wall of the second fin part; etching and removing the sacrificial layer and exposing the surface of the side wall of the first fin part; forming a conductive layer on the surfaces of the substrate and the side wall of the first fin part, wherein anti-punchthrough ions are contained in the conductive layer; forming a dielectric layer on the surface of the conductive layer, wherein the dielectric layer is exposed out of the surface of the side wall; and removing the side wall. The method of the present invention enables the electrical property of the formed fin field effect transistor to be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a fin field effect transistor. Background technique [0002] With the continuous development of semiconductor process technology, the development trend of semiconductor process nodes following Moore's Law continues to decrease. In order to adapt to the reduction of process nodes, the channel length of MOSFET field effect transistors has to be continuously shortened. The shortening of the channel length has the advantages of increasing the die density of the chip and increasing the switching speed of the MOSFET field effect tube. [0003] However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so that the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the pheno...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L21/20H01L21/205
CPCH01L21/205H01L29/66795H01L21/20
Inventor 赵海
Owner SEMICON MFG INT (SHANGHAI) CORP
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