Composite passivation film for semiconductor device and preparation method thereof

Abstract

The invention belongs to the semiconductor production technology field and especially relates to a semiconductor-device composite passive film. The passive film comprises five layer structures. The structures are characterized in that one layer is a polysilicon film layer located on a substrate; a SIPOS film layer is arranged on a polysilicon layer; a LTO film layer is arranged on the SIPOS film layer; a PSG film layer is arranged on the LTO film layer; and an oxygenation silicon dioxide film layer is located on the PSG film layer. In the invention, through using a low pressure chemical meteorological deposition mode, the five layers of films are successively deposited so that the composite films are interacted and form a system; junction surface passivation performance of a table-board large-power semiconductor device is effectively improved; the film can bear above 1600V voltage; a leakage current of a device is reduced; high temperature work stability and reliability of the device are increased; a work junction temperature of the device is increased; and a product yield rate of a production line is greatly increased.

Description

technical field [0001] The invention belongs to the technical field of semiconductor production, in particular to a composite passivation film for semiconductor devices and a preparation method thereof. Background technique [0002] The passivation process of semiconductor devices generally adopts single-layer glass passivation. Glass passivation can effectively prevent the contamination of the mesa pn junction, and can improve the surface breakdown characteristics of the mesa high-voltage devices, so that the high-voltage semiconductor devices can obtain stable voltage blocking capabilities. However, the single-layer glass passivation process has inconsistent thermal expansion coefficients between glass and silicon wafers, which easily leads to chip fragmentation under thermal stress, and glass is an insulating medium, which cannot shield the external electric field and cannot modulate the electric field on the pn junction surface of the table. Boron-containing glass The se...

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Problems solved by technology

However, the single-layer glass passivation process has inconsistent thermal expansion coefficients between glass and silicon wafers, which easily leads to chip breakage under thermal stress, and glass is an insulating medium, which cannot shield the external electric field and cannot modulate the surface electric field of the pn junction on the table. Boron-containing glass The semiconductor will also be doped to make the device low breakdown, so the passivation effect is limited, and the reliability of single-layer glass passivated high-voltage devices working under high temperature and high pressure conditions is also low

[0003] Mesa power semiconductor devices usually adopt the wet etching method of hydrofluoric acid + concentrated nitric acid + glacial acetic acid in the process of mesa molding. After the groove is etched, the groove is relatively rough. More importantly, the corrosion will cause lattice defects and Higher surface state density, the surface recombination of the device will be greatly enhanced, and the leakage current will be larger

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