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Array substrate, manufacturing method of array substrate, and display device

A technology of array substrates and substrates, applied in semiconductor/solid-state device manufacturing, optics, instruments, etc., can solve problems such as rising product costs and reduced production capacity of mass-produced products

Inactive Publication Date: 2013-04-03
BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, too many patterning processes will directly lead to an increase in product cost and a reduction in the production capacity of mass-produced products. Therefore, how to further reduce the number of patterning processes has become an issue of increasing concern.

Method used

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  • Array substrate, manufacturing method of array substrate, and display device
  • Array substrate, manufacturing method of array substrate, and display device
  • Array substrate, manufacturing method of array substrate, and display device

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preparation example Construction

[0033] An embodiment of the present invention provides a method for preparing an array substrate, comprising: step 1, forming a patterned layer including a gate electrode on the substrate; step 2, forming a patterned layer including a gate insulating layer on the substrate that has completed the preceding steps; step 3. Form a patterned layer including an active layer on the substrate that has completed the preceding steps; Step 4. Form a transparent conductive film and a metal film sequentially on the substrate that has completed the foregoing steps, and form a pattern layer including the first electrode, data line, and source through a patterning process. The patterned layer of electrode, drain electrode and thin film field effect transistor (Thin Film Transistor, be called for short as TFT) channel; Step 5, form the patterned layer that comprises passivation layer on the substrate that finishes preceding steps; Step 6, finish preceding steps A pattern layer including the sec...

Embodiment 1

[0036] Embodiment 1, the preparation method of the array substrate, such as figure 1 shown, including the following steps:

[0037] S10. Fabricate a metal thin film on the substrate, and form a patterning process such as figure 2 The gate metal layer 11 is shown, wherein the gate metal layer 11 includes a pattern layer of a gate electrode 11a, a gate line (not shown in the figure), and a pattern layer of a gate line lead 11b.

[0038] Specifically, a magnetron sputtering method can be used to prepare a layer with a thickness of to metal film. The metal material can usually be metals such as molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, or a combination structure of the above-mentioned thin films. Then, use a mask plate to process patterning processes such as exposure, development, etching, and stripping to form a pattern layer of gate electrodes 11a, gate lines (marked in the figure), and gate line leads 11b on a certain ar...

Embodiment 2

[0075] Embodiment 2, a method for preparing an array substrate, comprising the following steps:

[0076] S30, fabricate a metal thin film on the substrate, and form a gate metal layer 11 through a patterning process, wherein the gate metal layer 11 includes a pattern layer of a gate electrode 11a, a gate line (not shown in the figure), and a gate line lead 11b Make an insulating film on the substrate with the gate metal layer, and form a patterned layer of the gate insulating layer 12 with the first via hole 12a through a patterning process; on the substrate forming the patterned layer of the gate insulating layer 12 Make an active layer comprising one layer of amorphous silicon film and one layer of n+ amorphous silicon film, and form the pattern layer of active layer 13 comprising amorphous silicon pattern layer 13a and n+ amorphous silicon pattern layer 13b through a patterning process , formed as Figure 13 substrate shown.

[0077] Specifically, chemical vapor depositio...

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Abstract

An embodiment of the invention provides an array substrate, a manufacturing method of the array substrate, and a display device, and relates to the technical field of display. The manufacturing method includes steps of 1, forming a pattern layer with a grid electrode on a substrate; 2, forming a pattern layer with a grid insulation layer on the substrate subjected to the last step; 3, forming a pattern layer with an active layer on the substrate subjected to the second step; 4, sequentially forming a transparent conductive thin film and a metal thin film on the substrate subjected to the third step, and forming a pattern layer with a first electrode, a data line, a source electrode, a drain electrode and a thin film transistor (TFT) channel through pattern composition process; 5, forming a pattern layer with a passivated layer on the substrate subjected to the fourth step; and 6, forming a pattern layer with a second electrode on the substrate subjected to the fifth step. The manufacturing method is used for manufacturing the array substrate and the display device and the like. The array substrate, the manufacturing method of the array substrate and the display device have the advantages that pattern composition process times can be decreased, and accordingly, productivity of mass production products is improved, and cost is reduced.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method, and a display device. Background technique [0002] With the continuous development of TFT-LCD (Thin Film Transistor-Liquid Crystal Display, Thin Film Field Effect Transistor Liquid Crystal Display) display technology, more and more new technologies have been proposed and applied, such as high resolution, high aperture ratio, GOA (Gate on Array, array substrate row drive) technology, etc. At present, for TFT-LCD, in the prior art, an array substrate of ADvanced Super Dimension Switch (ADS for short) usually requires a gate metal layer mask, an active layer mask, and a gate insulating layer mask. film, the first electrode layer mask, the source-drain metal layer mask, the passivation layer mask, and the second electrode layer mask by seven patterning processes, and each patterning process includes film formation, exposure, devel...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/77G02F1/1362G02F1/1368
Inventor 郭建
Owner BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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