Magnetic random access memory

A magnetic memory, magnetic layer technology, applied in static memory, digital memory information, information storage and other directions, can solve the problem of "unable to read data"

Inactive Publication Date: 2013-04-03
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the read output cannot be increased by more than 200% under the premise of using the existing technology, and the information of data "1" and data "0" cannot be read at the same speed as SRAM

Method used

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no. 1 Embodiment approach ）

[0031] (basic structure)

[0032] The basic structure of the memory cell of the MRAM of the first embodiment is shown in figure 1 middle. The memory cell 1 includes an MTJ element 10 , a selection transistor 20 , and a diode 25 . As the MTJ element 10 , for example, a perpendicular magnetization spin injection element composed of a leakage field adjustment layer / nonmagnetic layer / reference layer / tunnel barrier layer / recording layer / underground layer is used. Here, the notation "A / B" means that the A layer is located above the B layer. In addition, the MTJ element 10 only needs to include at least a reference layer whose magnetization direction is fixed perpendicular to the film surface, a recording layer whose magnetization direction is variable perpendicular to the film surface, and a tunnel barrier provided between the reference layer and the recording layer. layer. Here, the film surface refers to the upper surface of the magnetic layer.

[0033] As the selection trans...

no. 2 Embodiment approach ）

[0056] The basic structure of the memory cell of the MRAM of the second embodiment is shown in Figure 9 middle. This memory cell 1 includes two MTJ elements 10 a and 10 b , one selection transistor 20 , and one diode 25 . The MTJ element 10a includes at least a recording layer 12a, a reference layer 16a, and a tunnel barrier layer 14a provided between the recording layer 12a and the reference layer 16a. In addition, the MTJ element 10b has at least a recording layer 12b, a reference layer 16b, and a tunnel barrier layer 14b provided between the recording layer 12b and the reference layer 16b. One terminal of the MTJ element 10a (that is, the electrode (not shown) on the side of the reference layer 16a) is connected to the first wiring 30a, and the other terminal (that is, the electrode (not shown) on the side of the recording layer 12a) is connected to one of the MTJ elements 10b. The terminal (an electrode (not shown) on the side of the recording layer 12 b ) is connected,...

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Abstract

The invention provides a magnetic memory to realize high-speed operations. A magnetic memory according to an embodiment includes: a magnetoresistive element including a first magnetic layer having a magnetization direction not to be changed by spin-injection writing, a second magnetic layer having a magnetization direction to be changeable by the spin-injection writing, and a tunnel barrier layer provided between the first and second magnetic layers; a first interconnect electrically connected to one of the first and second magnetic layers; a select transistor, with one of a source and drain thereof being electrically connected to the other one of the first and second magnetic layers; a second interconnect electrically connected to the other one of the source and drain; a diode having one terminal electrically connected to the other one of the first and second magnetic layers; a third interconnect electrically connected to the other terminal of the diode; and a sense amplifier electrically connected to the third interconnect.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from and is based on prior Japanese Patent Application No. 2011-209906 filed in Japan on September 26, 2011, the entire contents of which are hereby incorporated by reference. technical field [0003] Embodiments of the invention relate to a magnetic random access memory using a magnetoresistive element, a diode, and a transistor. Background technique [0004] With the opening of the era of cloud computing, there is an increasing demand for high-speed information processing in order to process large-scale increases in information. In the era of personal computers, information that is too large to handle has always been time-consuming for users to deal with. However, in the world of cloud computing, since information is processed in real time, it is impossible to make users spend time processing information. [0005] On the other hand, SRAM (Static Random Access Memory: Static Random A...

Claims

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Application Information

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IPC IPC(8): G11C11/16H01L27/22
CPCG11C11/1659G11C11/1673G11C11/1675G11C11/16G11C11/1655G11C11/161H10B61/00H10B61/22H10N50/10H10N50/01
Inventor 北川英二
Owner KK TOSHIBA
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