Vertical parasitic PNP device in BiCMOS technology and manufacturing method

Abstract

The invention discloses a vertical parasitic PNP device in the BiCMOS technology, which includes a current collection region, a base region, an emitter region, a pseudo buried layer and an N-type polycrystalline silicon, wherein the pseudo buried layer is formed at shallow slot field oxide bottoms on the two sides of the current collection region, transversely extends to an active region, is contacted with the current collection region, and forms deep hole contact in the shallow slot field oxide at the top of the pseudo buried layer to lead out collector electrodes; the emitter region is formed in a P-type ion injection region at the upper part of the base region; and the N-type polycrystalline silicon is formed at the upper part of the base region, is contacted with the base region, and leads out base electrodes through metal contacts connected with the N-type polycrystalline silicon. The invention further discloses a manufacturing method for the vertical parasitic PNP device in the BiCMOS technology. The device provided by the invention can be used as an output device in a high-speed and high-gain BiCMOS circuit, can effectively reduce the area as well as the resistance of the collector electrodes of a PNP tube, and improve the performance. The method provided by the invention needs no additional technology condition, and can reduce the manufacturing cost.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a vertical parasitic PNP device in a BiCMOS process, and also relates to a method for manufacturing the vertical parasitic PNP device in the BiCMOS process. Background technique [0002] In RF applications, higher and higher device characteristic frequencies are required. In the BiCMOS process technology, NPN transistors, especially silicon-germanium heterojunction transistors (SiGe) or silicon-germanium carbon heterojunction transistors (SiGeC HBT) are good choices for UHF devices. And the SiGe process is basically compatible with the silicon process, so SiGe HBT has become one of the mainstreams of UHF devices. In this context, the requirements for the output device are correspondingly increased, such as having a certain current gain coefficient and cut-off frequency. [0003] In the prior art, the output device can adopt a vertical parasitic PNP ...

AI Technical Summary

Problems solved by technology

The disadvantage is that the device area is large and the connection resistance of the collector is large

Since the extraction of the collector electrode in the prior art is realized through another active region adjacent to the collector region, and the other active region and the collector region need to be isolated by STI or other field oxygen, such This greatly limits the further reduction of the device size

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