Formation method of semiconductor structure

Abstract

The invention discloses a forming method of a semiconductor structure. The forming method comprises the steps of providing a substrate; forming a pattern material layer on the substrate; performing a groove forming step on the graphic material layer for multiple times, forming grooves in multiple positions of the graphic material layer in sequence, serving the remaining graphic material layer as a graphic layer, wherein the groove forming step comprises the steps that mask layers are formed on the graphic material layer, the mask layers comprise the first mask layer and the second mask layer located on the first mask layer, the second mask layer is provided with an opening; etching the graphic material layer by taking the second mask layer as a mask, and forming a groove in the graphic material layer; using the first mask layer on the top surface of the graphic material layer as a protective layer; removing the second mask layer; and after the pattern layer is formed, removing the protection layer. According to the embodiment of the invention, after the pattern layer is formed, the protection layer is removed, so that the material of the junction area between the top surface of the pattern layer and all the groove side walls is damaged only once, the chamfer at the top of the groove side wall is small, and the electrical performance of the semiconductor structure is optimized.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure. Background technique [0002] As semiconductor manufacturing technology becomes more and more sophisticated, integrated circuits are also undergoing major changes. The number of components integrated on the same chip has increased from the initial dozens or hundreds to the current millions. In order to meet the requirements of circuit density, the manufacturing process of semiconductor integrated circuit chips uses batch processing technology to form various types of complex devices on the substrate and connect them to each other to have complete electronic functions. At present, most of them are used between wires. The ultra-low-k interlayer dielectric layer is used as the dielectric material to isolate each metal interconnection, and the interconnection structure is used to provide wiring betwe...

AI Technical Summary

Problems solved by technology

However, compared with the miniaturization of components and the increase of integration, the number of conductor connections in the circuit continues to increase, and the formation quality of the interconnection structure has a great influence on the reliability of the circuit connection, and in severe cases, it will affect the normal operation of semiconductor devices.

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