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A method for improving read performance of solid-state hard disk

A solid-state hard disk, high-performance technology, applied in the input/output process of data processing, memory address/allocation/relocation, instruments, etc., can solve the problems of embedded systems affecting performance, large and fast memory overhead, etc., to improve NAND concurrency performance, ensure read performance, and reduce demand

Active Publication Date: 2021-02-09
RAMAXEL TECH SHENZHEN
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  • Claims
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AI Technical Summary

Problems solved by technology

[0014] In this process, a control node needs to be allocated for every 4KB, and in the control nodes belonging to the same command, most of its fields are repeated: such as operation type, logical address, physical address, etc. The overhead of large fast memory such as SRAM or DRAM, which can greatly affect performance in embedded systems
[0015] Furthermore, in the entire internal processing flow of reading, because it is divided into 4KB units from the source, many similar nodes need to be processed: construction, transmission, analysis, etc., which greatly restrict performance in high-bandwidth SSD systems

Method used

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Embodiment Construction

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0024] image 3 It is a schematic diagram of the NAND read process after the variable-length operation request is introduced. The main difference from the traditional implementation is that after the hard disk firmware receives the read command request, it does not directly divide into 4KB units, but pre-checks the internal mapping table, and will continuously fall 4KB request coalescing description within the same concurrent read unit. A typical example is a phys...

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Abstract

The invention discloses a method for improving the reading performance of a solid-state hard disk, which is characterized in that a command combination operation is added to the hard disk firmware, and after the hard disk firmware receives a read command from a host computer, it first passes through the command combination operation to successively fall on the same concurrent read unit The read command request is merged and described, and recorded as a merged read command. Specifically, multiple read commands that fall continuously in the same concurrent read unit are merged into a merged read command. After the merged read command, only the first read command information is recorded. The number of read requests is added to the data structure of the read command information, and the number of read requests is used to describe the number of read commands that continuously fall in the same concurrent read unit. By introducing variable-length read request control, the demand for high-speed memory such as DRAM or SRAM inside the SSD can be effectively reduced; at the same time, the overhead of CPU interaction and software attempts can be reduced, which can greatly improve the concurrency of NAND, thereby ensuring high-bandwidth scenarios. read performance.

Description

technical field [0001] The invention relates to solid-state hard disk control technology, in particular to a method for improving read performance of a solid-state hard disk. Background technique [0002] SSD (Solid State Drive) has been widely used in various occasions. With the development of the protocol, it has developed from the traditional SATA to the PCIe / NVMe era, and its interface performance has also improved several times. [0003] In the SATA era, the typical interface performance is around 500MB / s, while under the PCIe / NVMe interface specification, a bandwidth of 2-3GB / s is typically required. Correspondingly, the upper limit of its interface performance is also raised from 500MB / s to 3GB / s. [0004] The architecture design of traditional SSDs needs to take into account small-grained reads and writes (4K), and the description of operation requests is relatively fragmented. Due to the limitation of the interface speed, these will not expose the bottleneck when ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06G06F12/06
CPCG06F3/061G06F12/063
Inventor 王猛徐伟华
Owner RAMAXEL TECH SHENZHEN
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