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Products for reducing barrier layer resistive area (ra) and protection of perpendicular magnetic anisotropy (pma) for magnetic device applications

A barrier layer and magnetic technology, applied in the field of high-performance magnetic tunnel junction unit, can solve problems affecting writing reliability and other issues

Active Publication Date: 2020-04-10
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, the write voltage is proportional to the stress applied to the tunnel barrier layer during the write operation. Excessive stress will cause durability problems, for example, it will affect repeated writing without damaging the tunnel barrier layer. write reliability into the same device

Method used

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  • Products for reducing barrier layer resistive area (ra) and protection of perpendicular magnetic anisotropy (pma) for magnetic device applications
  • Products for reducing barrier layer resistive area (ra) and protection of perpendicular magnetic anisotropy (pma) for magnetic device applications
  • Products for reducing barrier layer resistive area (ra) and protection of perpendicular magnetic anisotropy (pma) for magnetic device applications

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Embodiment Construction

[0042] The invention discloses a method for forming a high-efficiency magnetic tunnel junction unit, which is applied to high-density magnetoresistive random access memory, spin torque magnetoresistive random access memory, or spin torque oscillator (STO ) A device, in which the free layer and the reference layer are prevented from being substantially oxidized by using the tunnel barrier layer formation process to reduce the resistance area and make the perpendicular magnetic anisotropy better preserved in one or both of the free layer and the reference layer . At the same time, the first interface (oxide layer / reference layer) and the second interface (oxide layer / free layer) can be used to generate interface perpendicular anisotropy and strengthen the perpendicular magnetic anisotropy of adjacent magnetic layers.

[0043] As magnetic devices require higher surface density, magnetic tunnel junction components tend to be miniaturized and shrink in size and thickness of each layer...

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Abstract

A magnetic tunneling junction for forming a tunneling barrier layer, which discloses a high tunneling magnetoresistance ratio and a low resistance area value, the method preserves vertical magnetism in the upper and lower magnetic layers adjacent to the upper and lower surfaces of the tunneling barrier layer Anisotropy; its key feature is that the maximum oxygen pressure used after the first magnesium metal layer is deposited on the lower magnetic layer is 10 ‑5 In Thor's passive oxidation process, the lower half (21) of the first magnesium metal layer remains unoxidized to protect the lower magnetic layer during subsequent oxidation or annealing steps that complete the tunneling barrier layer and the magnetic tunneling junction. Substantially oxidized, the uppermost magnesium metal layer can be used as the uppermost layer of the tunneling barrier layer before depositing the upper magnetic layer.

Description

[0001] Related patent applications [0002] This application is related to the following cases: U.S. Patent Publication No. 8557407, U.S. Patent Publication No. 8592927, U.S. Patent Publication No. 8609262, U.S. Patent Application Publication No. 2012 / 0205758, U.S. Patent Application Publication No. 2013 / No. 0175644, which is all assigned to the same assignee, and is incorporated here as a whole for reference. Technical field [0003] The present invention relates to a high-performance magnetic tunnel junction (MTJ) unit, which includes an oxide tunnel barrier layer and / or an oxide shielding layer such as magnesium oxide, and particularly refers to a method of forming an oxide layer , To provide a low resistance area (RA) product with good writability and reliability, and to protect (maintain) the vertical anisotropy of the interface where the magnetic layer is bonded. Background technique [0004] Magnetoresistive random access memory based on the combination of silicon complemen...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L43/12H01L43/08H01F41/30G11C11/16G01R33/09
CPCG01R33/096G01R33/098G11C11/161H01F41/307G11B5/3909G11B2005/3996H10N50/01H10N50/10
Inventor 刘焕龙朱健皮克宇童儒颖
Owner TAIWAN SEMICON MFG CO LTD
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