Preparation method of heterogeneous Ge-based PIN diode string in reconfigurable annular antenna
A PIN diode and loop antenna technology, which is applied in the field of preparation of heterogeneous Ge-based PIN diode strings, can solve the problems of large injection dose and energy, incompatibility, and influence on solid-state plasma concentration, so as to improve the breakdown voltage and suppress the influence Effect
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Embodiment 1
[0062] An embodiment of the present invention provides a method for preparing a heterogeneous Ge-based PIN diode string in a reconfigurable loop antenna. The heterogeneous Ge-based plasmonic PIN diodes are used to manufacture a reconfigurable loop antenna. Please refer to figure 1 , figure 1 It is a structural schematic diagram of a reconfigurable loop antenna according to an embodiment of the present invention; the loop antenna includes: a semiconductor substrate (1); a dielectric plate (2); a first plasma PIN diode ring (3), a second plasma PIN The diode ring (4), the first DC bias line (5) and the second DC bias line (6) are all arranged on the semiconductor substrate (1); the coupled feed source (7) is arranged on On the medium plate (2);
[0063] Please refer to figure 2 , figure 2 It is a flowchart of a method for preparing a heterogeneous Ge-based plasmonic PIN diode according to an embodiment of the present invention. The preparation method comprises steps:
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Embodiment 2
[0102] See Figure 7a-Figure 7r , Figure 7a-Figure 7r It is a schematic diagram of a preparation method of a heterogeneous Ge-based plasma pin diode according to an embodiment of the present invention. On the basis of the first embodiment above, to prepare a GeOI-based solid-state plasma with a channel length of 22 nm (the length of the solid-state plasma region is 100 microns) Take the PIN diode as an example to describe in detail, the specific steps are as follows:
[0103] Step 1, substrate material preparation steps:
[0104] (1a) if Figure 7a As shown, the (100) crystal orientation is selected, the doping type is p-type, the doping concentration is a GeOI substrate 101 of 1014 cm-3, and the thickness of the top layer Ge is 50 μm;
[0105] (1b) if Figure 7b As shown, a first layer of SiO with a thickness of 40nm is deposited on a GeOI substrate by chemical vapor deposition (Chemical vapor deposition, CVD for short). 2 layer 201;
[0106] (1c) Deposit a layer of fi...
Embodiment 3
[0133] Please refer to image 3 , image 3 It is a schematic diagram of a device structure of a heterogeneous Ge-based plasmonic PIN diode according to an embodiment of the present invention. The heterogeneous Ge-based plasmonic PIN diode employs the above-mentioned as figure 1 The preparation method shown is made, specifically, the Ge-based plasma PIN diode is prepared and formed on the GeOI substrate 301, and the P region 304, the N region 305 of the pin diode and the lateral direction are located between the P region 304 and the N region 305 The I regions in between are located in the top layer Ge302 of the GeOI substrate. Wherein, the PIN diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 304 and the N region 305, and the depth of the isolation trench 303 is greater than or equal to the thickness of the top layer Ge302.
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