Preparation method and device of heterogeneous sige-based solid-state plasmonic pin diode
A plasma and diode technology, applied in the field of preparation of ionic PiN diodes, can solve the problems of low integration, large implantation dose and energy, incompatibility, etc., so as to improve the implantation efficiency and current, suppress the influence, and improve the breakdown voltage. Effect
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Embodiment 1
[0052] See figure 1 , figure 1 It is a flowchart of a manufacturing method of a heterogeneous SiGe-based solid-state plasma PiN diode according to an embodiment of the present invention. antenna. The method comprises the steps of:
[0053](a) selecting a SiGeOI substrate with a certain crystal orientation, and setting an isolation region on the SiGeOI substrate;
[0054] (b) etching the substrate to form a P-type trench and an N-type trench, the depth of the P-type trench and the N-type trench is less than the thickness of the top layer SiGe of the substrate;
[0055] (c) filling the P-type trench and the N-type trench, and forming a P-type active region and an N-type active region in the top layer SiGe of the substrate by ion implantation; and
[0056] (d) Leads are formed on the substrate to complete the fabrication of heterogeneous SiGe-based solid-state plasmonic PiN diodes.
[0057] Among them, for step (a), the reason for using SiGeOI substrate is that solid-state p...
Embodiment 2
[0092] See Figure 2a-Figure 2r , Figure 2a-Figure 2r It is a schematic diagram of a method for preparing a heterogeneous SiGe-based solid-state plasma PiN diode according to an embodiment of the present invention. On the basis of the above-mentioned embodiment 1, to prepare a solid-state diode with a channel length of 22 nm (the length of the solid-state plasma region is 100 microns) Plasma PiN diode is taken as an example to describe in detail, the specific steps are as follows:
[0093] Step 1, substrate material preparation steps:
[0094] (1a) if Figure 2a As shown, the SiGeOI substrate 101 with (100) orientation is selected, the doping type is p-type, and the doping concentration is 10 14 cm -3 , the thickness of the top layer SiGe is 50 μm;
[0095] (1b) if Figure 2b As shown, the method of chemical vapor deposition (Chemical vapor deposition, referred to as CVD) is used to deposit a layer of first SiO with a thickness of 40 nm on the SiGe layer. 2 layer 201; ...
Embodiment 3
[0123] Please refer to image 3 , image 3 It is a schematic diagram of a device structure of a heterogeneous SiGe-based solid-state plasma PiN diode according to an embodiment of the present invention. The heterogeneous SiGe-based solid-state plasmonic PiN diode adopts the above-mentioned figure 1 The preparation method shown is made, specifically, the SiGe-based solid-state plasma PiN diode is prepared and formed on the SiGeOI substrate 301, and the P region 304, the N region 305 of the PiN diode and the laterally located P region 304 and the N region The I regions between 305 are located in the top layer SiGe 302 of the substrate. Wherein, the PiN diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 304 and the N region 305, and the depth of the isolation trench 303 is greater than or equal to the thickness of the top SiGe layer.
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