Tunneling field effect transistor capable of increasing current switching ratio

Abstract

The invention belongs to the logic device and circuit field in the super-large scale integrated circuit field and relates to a tunneling field effect transistor capable of increasing a current switching ratio. According to the tunneling field effect transistor, a low-K dielectric region is arranged between a source region and a drain region, so that an electric field between the source region and an intrinsic region can be increased, and therefore, on-state current can be improved, and off-state current can be suppressed; a doped layer is adopted, so that a reversely biased PN junction can be formed based on the substrate, and therefore, the contact of a source region-low-K dielectric region-drain region structure with the substrate can be isolated, and the off-state current of the tunneling field effect transistor (TFET) can be decreased. An on-state current increasing mode and an off-state current suppressing mode can be combined and overlapped with each other. Thus, the tunneling field effect transistor of the invention can improve the on-state current, is compatible with conventional CMOS technologies, is low in cost and can achieve a high current switching ratio.

Description

technical field [0001] The invention belongs to the field of logic devices and circuits in the field of ultra-large-scale integrated circuits, and relates to a longitudinal tunneling TFET device that increases the on-state current, in particular to a tunneling field effect transistor that increases the current switching ratio. Background technique [0002] With the advancement of lithography, implantation and other process technologies, the integration of chips is getting higher and higher, and the power consumption density is also increasing; and as the feature size of MOSFET devices is getting smaller and smaller, the short channel effect, GIDL (gate Drain leakage current) and other effects become serious, which further increases the off-state current. Therefore, the problem of power consumption is one of the main obstacles affecting the development of large-scale integrated circuit chips. [0003] Reducing device leakage is a direct means to reduce integrated circuit pow...

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Problems solved by technology

[0006] Achieving a large on-state current while maintaining a low off-state current TFET, that is, a TFET with a high switching ratio is the goal of the unanimous efforts of researchers. However, the current off-state current of the actual tunneling field effect transistor is relatively large, especially in the short In the case of a channel, the off-state current deteriorates severely, which is mainly due to the tunneling process controlled by the drain in addition to the tunneling process controlled by the gate in the TFET device.

Although there is no gate-controlled tunneling when the device is in the off state, if the drain voltage is too large or the channel is short, tunneling from the source region to the intrinsic region controlled by the drain voltage will occur in the lower part of the source region, and the leakage current will increase. Large, in the case of TFETs made of narrow bandgap, the leakage current problem is more serious

TFETs with high current switching ratio characteristics face great challenges

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