4H-SiC metal-semiconductor field effect transistor with double-sunken buffer layer

Abstract

The invention discloses a 4H-SiC metal-semiconductor field effect transistor with a double-sunken buffer layer. The 4H-SiC metal-semiconductor field effect transistor comprises a 4H-SiC semi-insulating substrate, a P type buffer layer and an N type channel layer from bottom to top, wherein a source electrode cap layer and a drain electrode cap layer are respectively arranged on two sides of the N type channel layer; a source electrode and a drain electrode are respectively arranged on the surfaces of the source electrode cap layer and the drain electrode cap layer; a gate electrode is formed on one side, close to the source electrode cap layer, above a channel; grooves are arranged on the upper end face of the P type buffer layer and under a gate source and a gate leakage. The 4H-SiC metal-semiconductor field effect transistor has the advantages that the output drain electrode current is obviously improved, and the breakdown voltage is stable.

Description

technical field [0001] The invention relates to the technical field of field effect transistors, in particular to a 4H-SiC metal semiconductor field effect transistor with double recessed buffer layers. Background technique [0002] SiC materials have outstanding material and electrical properties such as wide band gap, high breakdown electric field, high saturation electron migration velocity, and high thermal conductivity, making them suitable for high-frequency and high-power device applications, especially high temperature, high voltage, aerospace, satellite, etc. It has great potential in high-frequency high-power device applications in harsh environments. In SiC allomorphs, the electron mobility of 4H-SiC with hexagonal close-packed wurtzite structure is nearly three times that of 6H-SiC, so 4H-SiC materials are used in high-frequency and high-power devices, especially in metal-semiconductor fields. Effect transistor (MESFET) occupies a major position in the applicati...

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Problems solved by technology

[0004] Although the breakdown voltage of the double-recess structure 4H-SiC MESFET is increased due to the fact that half the length of the source side of the gate is recessed into the N-type channel layer, the saturation leakage current has not been substantially improved.

And in practice, the process of reactive ion etching (RIE) will form lattice damage on the surface of the drift region of the device, resulting in a decrease in the effective mobility of carriers in the N-type channel layer, thereby reducing the drain current. In terms of current output characteristics manifested as a degradation of the saturation current

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