An electrostatic discharge protection circuit with adjustable maintenance voltage

A technology for electrostatic discharge protection and voltage maintenance, applied in circuits, electrical components, electric solid devices, etc., can solve problems such as latch-up problems, achieve full discharge, avoid latch-up problems, and avoid false triggering effects

Active Publication Date: 2017-02-15
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the trigger voltage triggered by the thyristor SCR itself is as high as tens of volts, and the maintenance voltage is often lower than the chip operating power supply voltage V DD , which will potentially cause latch-up problems

Method used

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  • An electrostatic discharge protection circuit with adjustable maintenance voltage
  • An electrostatic discharge protection circuit with adjustable maintenance voltage
  • An electrostatic discharge protection circuit with adjustable maintenance voltage

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Embodiment Construction

[0034] The specific implementation of the present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but not to limit the scope of the present invention.

[0035] Such as image 3 Shown is a schematic structural diagram of an ESD protection circuit with adjustable sustain voltage provided by the present invention.

[0036] This embodiment provides an electrostatic discharge protection circuit with adjustable sustain voltage, including a transient trigger module, a thyristor bleeder device, and a sustain voltage adjustment module; the sustain voltage adjustment module is connected to the thyristor and includes: a resistor R 2 , Capacitance C 2 , Inverter INV 1 , And PMOS transistor M p1 And M P2 ; Among them, the resistance R 2 And the power pin V DD Connected, resistance R 2 The other end of the capacitor C 2 The upper plate is connected; the capacit...

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PUM

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Abstract

The invention relates to the field of electronic static discharge (ESD) protecting circuits of integrated circuit chips, and in particular relates to an instantaneously-triggered and adjustable maintaining voltage type ESD protecting circuit. The adjustable maintaining voltage type electronic static discharge protecting circuit comprises an instantaneous triggering module, a release device controlled silicon and a maintaining voltage regulating module; the maintaining voltage regulating module is connected with the controlled silicon and comprises a resistor R2, a capacitor C2, an inverter INV1, a PMOS (P-channel Metal Oxide Semiconductor) Mp1 and a PMOS MP2. With the adoption of the adjustable maintaining voltage type electronic static discharge protecting circuit, the maintaining voltage can be kept to be greatly less than the power supply voltage when then chip is in an idle state, and thus the electronic static charge can be fully released; when the chip is in a working state, the maintaining voltage is more than the power supply voltage to avoid the latch-up effect.

Description

Technical field [0001] The invention relates to the field of integrated circuit chip electrostatic discharge (Electronic Static Discharge, ESD) protection circuits, in particular to an ESD protection circuit using transient triggering and adjustable sustain voltage. Background technique [0002] In order to obtain faster chip operating speed, smaller integrated area, smaller operating voltage and smaller power consumption, the process feature size of integrated circuits is continuously reduced. At the same time, the gate oxide layer of the device is getting thinner and thinner, resulting in a smaller and smaller breakdown voltage. Integrated circuit chips are inevitably subjected to electrostatic shock during manufacturing, packaging, and work. In a very short time, a large amount of charge is transferred to the corresponding pins of the chip. If a large amount of charge cannot be discharged in time, the high voltage will cause damage to the internal circuit of the chip and malf...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/60
Inventor 王源郭海兵陆光易张立忠贾嵩张兴
Owner PEKING UNIV
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