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Epitaxial wafer substrate capable of reducing auto-doping during epitaxy, epitaxial wafer and semiconductor device

An epitaxial wafer and self-doping technology, which is applied to semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc. It can improve the uniformity of resistivity, improve the uniformity of resistance, and reduce the production cost.

Inactive Publication Date: 2012-01-18
SHANGHAI JINGMENG SILICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Currently, the acceptable range for resistivity uniformity of epitaxial wafers is less than 5%
However, the epitaxial wafers in the prior art have the lowest resistivity uniformity of only 2.5%. According to the existing technology, it is difficult to reduce the resistivity uniformity value.
[0009] The interdiffusion of impurities in the substrate and impurities in the epitaxial layer reduces the resistance uniformity of the epitaxial layer

Method used

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  • Epitaxial wafer substrate capable of reducing auto-doping during epitaxy, epitaxial wafer and semiconductor device
  • Epitaxial wafer substrate capable of reducing auto-doping during epitaxy, epitaxial wafer and semiconductor device
  • Epitaxial wafer substrate capable of reducing auto-doping during epitaxy, epitaxial wafer and semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1-4

[0036] figure 2 It is a schematic diagram of the structure of the epitaxial wafer substrate that can reduce self-doping during epitaxy in Embodiment 1-4. Such as figure 2 As shown, the epitaxial wafer substrate that can reduce self-doping during epitaxy includes a substrate body 1 , and a silicon dioxide layer 4 is provided on the back of the substrate body 1 . The substrate body 1 can be N-type, that is, doped with arsenic, phosphorus or antimony; the substrate body 1 can also be P-type, that is, doped with boron.

[0037] The silicon dioxide layer on the back side of the substrate body can use the APCVD (atmospheric pressure chemical vapor deposition) method to complete the silicon dioxide layer of the back-sealing structure of the substrate.

[0038] Chemical reaction equation: SiH 4 +2O 2 → SiO 2 +2H 2 o

[0039] Silica uses the WJ machine, which uses a low-temperature process, the reactor structure is relatively simple, and the deposition rate is fast. In the se...

Embodiment 5-8

[0042] image 3 It is a schematic diagram of the epitaxial wafer structure in Embodiment 5-8. Examples 5-8 used the substrates in Examples 1-4, respectively. Such as image 3 shown, epitaxial wafers, including figure 2 In the shown substrate, an epitaxial layer 3 is grown on the front surface of the substrate body 1 . The substrate includes a substrate body 1 , and a layer of silicon dioxide film 4 is arranged on the back of the substrate body 1 . The epitaxial layer 3 is arranged on the front surface of the substrate body 1 .

[0043] In Comparative Examples 1-4, no silicon dioxide layer is provided on the backside of the heavily arsenic-doped substrate body, and the epitaxial layer is directly grown on the front side of the substrate body.

[0044] The comparative data of the epitaxial layer resistance uniformity of Examples 5-8 and Comparative Examples 1-4 are shown in Table 1-4. In each group of comparisons, two substrate bodies produced in the same batch were selec...

Embodiment 9-12

[0056] Figure 4 It is a schematic diagram of the structure of an epitaxial wafer substrate that can reduce self-doping during epitaxy in Examples 9-12. Such as Figure 4 As shown, the epitaxial wafer substrate that can reduce self-doping during epitaxy includes a substrate body 1 , and a layer of silicon dioxide film 4 is provided on the back of the substrate body 1 . The substrate body 1 has a monocrystalline silicon layer 2 on the front side. The thickness of the single crystal silicon layer 2 is 2-5 μm. Its specific thickness can be determined according to the overall thickness of the epitaxial wafer and the thickness of the substrate body. The higher the substrate thickness, the thicker the monocrystalline silicon layer. In subsequent production, an epitaxial layer is grown on the surface of the single crystal silicon layer 2 .

[0057] The substrate body 1 can be N-type, that is, doped with arsenic, phosphorus or antimony; the substrate body 1 can also be P-type, th...

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Abstract

The invention discloses an epitaxial wafer substrate capable of reducing auto-doping during epitaxy. The epitaxial wafer substrate comprises a substrate body, and is characterized in that: the back surface of the substrate body is provided with a silicon dioxide layer. When an epitaxial layer generated by using the epitaxial wafer substrate capable of reducing the auto-doping during epitaxy is used, the resistivity uniformity numerical value can be less than 1.5 percent. Compared with an epitaxial layer which is generated by not using the epitaxial wafer substrate capable of reducing the auto-doping during epitaxy, the epitaxial layer which is generated by using the epitaxial wafer substrate capable of reducing the auto-doping during epitaxy has higher epitaxial layer resistance uniformity. By using the epitaxial wafer substrate capable of reducing the auto-doping during epitaxy, the follow-up production cost can be reduced, and the product quality can be improved.

Description

technical field [0001] The invention relates to an epitaxial wafer substrate, an epitaxial wafer and a semiconductor device capable of reducing self-doping during epitaxy. Background technique [0002] For semiconductor devices, the epitaxial layer needs to have a perfect crystal structure, and there are certain requirements for the thickness, conductivity type, resistivity and resistance uniformity of the epitaxial layer. The resistivity of semiconductors generally changes with changes in temperature, doping concentration, magnetic field strength, and light intensity. [0003] The combination of epitaxial layer and substrate and product specifications are determined by the application of subsequent products. Circuits and electronic components need to be fabricated on epitaxial wafers, and different applications such as PMOS, NMOS, CMOS and bipolar in saturation and non-saturation in MOS. With the development trend of integrated circuit design towards lightness, thinness, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/00C30B25/18
Inventor 顾昱钟旻远林志鑫陈斌
Owner SHANGHAI JINGMENG SILICON CORP
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