Silicon carbide (SiC) metal oxide semiconductor (MOS) capacitor with composite dielectric layer and manufacturing method for SiC MOS capacitor with composite dielectric layer

Abstract

The invention discloses a silicon carbide (SiC) metal oxide semiconductor (MOS) capacitor with a composite dielectric layer, and mainly solves the problem that the conventional SiC MOS capacitor has high interface-state density and weak voltage endurance. The structure of the capacitor is that: an N-type heavy doping SiC substrate layer, an N-type light doping SiC epitaxy layer, an SiO2 transition layer and an HfxAl1-xON dielectric layer are sequentially arranged from bottom to top; the back of the SiC substrate and the surface of the HfxAl1-xON are sputtered with metal Al to form positive and negative electrodes respectively; the N-type SiC epitaxy layer is 10 to 100 mu m thick, the doping concentration is 1*10<15> to 5*10<15>cm<-3>; the SiO2 transition layer is 1 to 15 mu m thick, and the HfxAl1-xON dielectric layer is 10 to 30 mu m thick. The SiO2 transition layer and the HfxAl1-xON layer form a composite dielectric layer structure so as to reduce the interface-state intensity of the dielectric layer and the SiC interface, reduce the current leakage of the dielectric layer, improve the voltage-resisting capability of the dielectric layer, and improve the reliability of the SiC MOS devices. The invention also discloses a manufacturing method for a SiC power integrated circuit and a SiC power isolation device.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to microelectronic devices, in particular to a SiC MOS capacitor with a composite dielectric layer, which can be used in the manufacture of SiC power integrated circuits and SiC power separation devices. Background technique [0002] As a typical representative of the third-generation semiconductor, SiC material has become an ideal material for making high-temperature, high-power, high-frequency and high-radiation-resistant devices due to its excellent physical and chemical properties. Compared with the first-generation semiconductor materials represented by Si and the second-generation semiconductor materials represented by GaAs, SiC materials have the advantages of large band gap, high critical breakdown electric field, and high thermal conductivity. Therefore, SiC materials and devices are currently , Process research and development has become a hot spot in the field of mi...

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Problems solved by technology

Although these two process methods can improve the interface characteristics of the device to a certain extent, there are still some negative effects. For example, the first method cannot control the nitrogen content at the interface, and the process is more difficult.

Although the second method can precisely control the nitrogen content at the interface and effectively reduce the interface state density, the N + The ion implantation process leads to damage to the oxide layer and interface lattice, and the device characteristics are affected

And neither of the above two methods can improve the reliability of the oxide layer

In addition, for the reliability of the oxide layer, some researchers use high-k dielectric materials, such as HfO 2 , Al 2 o 3 instead of SiO 2 layer is used as the dielectric material of the MOS device. Although this method improves the withstand voltage capability of the dielectric layer to a certain extent, this process cannot effectively reduce the interface state density of the device, resulting in excessive gate leakage current.

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