Semiconductor storage device

Abstract

By arranging a dummy cell array (201) in a memory array (101), and an intermediate buffer (300) between input / output circuits (400), control signals of the input / output circuits (400) can be operated at a high speed and a high frequency, while minimizing increase in circuit size even for memory having a wide bit-width.

Description

technical field [0001] The present invention relates to speeding up of semiconductor memory devices. Background technique [0002] When a memory with a large bit width is operated at high speed, the wiring resistance, wiring capacitance, and gate capacitance when transmitting the control signals of the input and output circuits such as the sense amplifier enable signal, the bit line precharge signal, and the column decoding signal change. Larger, so the waveform is more difficult to rise or fall as it goes to the rear stage. Therefore, in order to increase the speed, there is a configuration in which a control signal is supplied via a repeater (see Patent Document 1). [0003] Patent Document 1: Japanese Patent Application Laid-Open No. 11-353870 [0004] In the case of a memory with a conventional general structure, if the bit width is increased, the wiring resistance, wiring capacitance and wiring resistance of the control signals input and output to the output circuit, ...

AI Technical Summary

Problems solved by technology

[0004] In the case of a memory with a conventional general structure, if the bit width is increased, the wiring resistance, wiring capacitance and wiring resistance of the control signals input and output to the output circuit, such as the sense amplifier activation signal, the bit line precharge signal, and the column decoding signal, etc. The gate capacitance will become larger, so it is difficult to adapt to high speed

[0005] In addition, in the case of disposing a repeater as in Patent Document 1, because of the region of the repeater, it is disposed in a region other than the region matching the pitch of memory cells such as a sense amplifier or a column decoder. Therefore, the storage unit cannot be arranged around the repeater, so this area will become a large dead space, and the consequences of increasing the area in order to achieve high speed will become greater

Images