Tunneling field effect transistor with T-shaped grid structure and low power consumption

Abstract

The invention provides a tunneling field effect transistor (TFET) with a T-shaped grid structure and low power consumption, and belongs to the field of field effect transistor logic devices and circuits in complementary metal oxide semiconductor (CMOS) ultra large scale integrated circuits (ULSI). The TFET comprises a source electrode, a drain electrode and a control grid, wherein the control grid extends toward the end of the source electrode to form a T shape; the T-shaped control grid consists of an extending grid region and the original control grid region; and an active region covered below the extending grid region is a channel region and is made of a substrate material. By using the T-shaped grid structure, the source region of the TFET encircles a channel, so that the conduction current of a device is improved. Compared with the conventional planar TFET, the TFET can achieve higher conduction current and steeper subthreshold slope under the same process conditions and the same size of the active region.

Description

technical field [0001] The invention belongs to the field of field effect transistor logic devices and circuits in CMOS ultra large integrated circuits (ULSI), in particular to a tunneling field effect transistor (TFET). Background technique [0002] As the size of the device continues to shrink, the negative impact of the short channel effect of the device is increasing. DIBL (drain-to-barrier lowering effect) and band-band tunneling effect make the off-state leakage current of the device continuously increase. Not only that, the subthreshold slope of traditional MOSFET devices cannot be reduced synchronously with the reduction of device size due to the theoretical limitation of KT / q. Therefore, with the decrease of the threshold voltage of the device, the subthreshold leakage current is also increasing continuously. Today, the resulting static power consumption has become the focus of everyone's attention in small-size devices. In order to break through the theoretical ...

AI Technical Summary

Problems solved by technology

At present, the main challenge encountered by TFET is that the driving current is not enough due to the influence of tunneling current.

At present, the main methods to increase the conduction current of TFET are: (1) Thinning the thickness of the gate dielectric layer, increasing the dielectric constant of the gate dielectric layer and improving the gate control ability. This method uses high-K dielectrics compared to growing silicon dioxide gate dielectrics. The process is relatively complex, and due to the influence of gate leakage, the thickness of the dielectric layer also has a limit value; (2) use narrow bandgap semiconductor materials to reduce the width of the tunneling barrier and increase the tunneling current. This method is due to the introduction of other Semiconductor materials undoubtedly increase the cost and process complexity

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