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Semiconductor device and method for manufacturing the same

A manufacturing method, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., to avoid damage and ensure barrier properties

Inactive Publication Date: 2011-04-20
TOKYO ELECTRON LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

On the other hand, the energy transfer efficiency of Ar plasma to tantalum nitride (TaN) is low, and it is difficult to provide energy for improving crystallization (sufficient energy for improving crystallization cannot be provided)
As a result, a TaN film with good crystallinity cannot be formed on the CF substrate

Method used

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  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same
  • Semiconductor device and method for manufacturing the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach

[0065] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Figure 1A to Figure 1D It is a figure which shows the formation process of a wiring layer in the semiconductor device concerning embodiment of this invention.

[0066] Figure 1A It is a cross-sectional view after forming a wiring pattern on a substrate. The silicon oxide film (SiO 2 On the film) 111, a wiring pattern 111A formed of a low-resistance metal such as copper (Cu) is embedded. Figure 1B is a cross-sectional view of a substrate after forming an interlayer insulating film on a wiring pattern. exist Figure 1B process, the SiO 2 On the film 111 are formed a low dielectric constant interlayer insulating film 113 , an etch stop film 114 such as a SiN film, and a low dielectric constant interlayer insulating film 115 via an etching stopper film 112 such as a silicon nitride film (SiN film).

[0067] For the interlayer insulating films 113, 115, for ...

specific example 1

[0097] Figure 10 and Figure 11 The results of analysis in the depth direction by SIMS (Secondary Ion Mass Spectrometry: Secondary Ion Mass Spectrometry) are shown when Cu is formed on TaN formed on a silicon thermal oxide film by applying an RF bias. The horizontal axis represents the depth from the surface, and the vertical axis represents ion intensity (Ion Intensity) (cps). Figure 10 is the analysis result before annealing, Figure 11 It is the result of analysis in the depth direction after the substrate was annealed at 500° C. for 1 hour. exist Figure 10 and Figure 11 In, Cu is atomic concentration (Cu Concentration) (atm / cm 3 ), whose scale is represented by the vertical axis on the right. The scale of the ion concentration (Ion Intensity) of other atoms is given by the vertical axis on the left.

[0098] In the figure, the thick solid line is the concentration of Cu, the white triangle is the concentration of Ta, the white square is the concentration of N, a...

specific example 2

[0105] Figure 14 and Figure 15 It shows the SIMS analysis result when RF bias was applied and Cu was formed on the TaN formed on the fluorocarbon film. Figure 14 is that before annealing, Figure 15 is the analysis result after annealing at 200°C. In the figure, the thick solid line is the concentration of F, the dotted line is the concentration of C, the white circle is the concentration of Cu, the white triangle is the concentration of Ta, and the white square is the concentration of N. Concentration of F and C (F, C Concentration) (atm / cm 3 ) is represented by the scale on the right, and the intensity (Ion Intensity) (cps) of other atoms is represented by the scale on the left.

[0106] Such as Figure 14 As shown, F, C and Ta diffused into Cu, but Cu did not diffuse into TaN before and after annealing. After annealing, Ta diffused into Cu.

[0107] Figure 16 and Figure 17 The results of SIMS analysis in the case where Cu was formed on TaN formed on a fluorocarb...

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Abstract

A method of manufacturing a semiconductor device including a sputtering process for forming a barrier film mainly having tantalum or tantalum nitride on an interlayer insulator formed by sputtering using a xenon gas. The sputtering process may include a step of forming one barrier film mainly composed of tantalum nitride on a substrate by sputtering using a xenon gas by applying a RF bias, and a step for forming another barrier film mainly composed of tantalum on the first barrier film by sputtering using a xenon gas without applying the RF bias. The barrier film may be formed by changing theRF bias continuously, and forming the interlayer insulator side by applying the RF bias, and forming the wiring side without applying the RF bias.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the same. More specifically, it relates to a semiconductor device including a barrier film between wiring and an underlying insulator, and a semiconductor manufacturing method for forming the barrier film by sputtering. Background technique [0002] In current semiconductor integrated circuit devices, a multilayer wiring structure in which wiring layers in which wiring patterns are embedded in an interlayer insulating film are stacked in order to connect a plurality of elements formed on a substrate is used. owned. The performance of integrated circuits has been improved with higher integration and higher operating frequency due to miniaturization of devices. Due to the high density of wiring accompanying the miniaturization of devices, the operation delay time of integrated circuits has increased relatively, not only the gate delay time of transistors as a key par...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/532H01L21/768H01L21/3205
CPCH01L21/76846H01L21/2855H01L23/53295H01L23/53238H01L21/76843C23C14/345C23C14/0641H01L2924/0002H01L2924/00H01L21/28
Inventor 根本刚直寺本章伸大见忠弘
Owner TOKYO ELECTRON LTD
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