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Silicon single crystal wafer for IGBT and method for manufacturing silicon single crystal wafer for IGBT

a technology of silicon single crystal and manufacturing method, which is applied in the direction of crystal growth process, crystal growth process, polycrystalline material growth, etc., can solve the problems of difficult to manufacture defect-free wafers by the cz method, gate oxide integrity (goi) becomes inferior, and the rate of silicon single crystals is reduced. , to achieve the effect of improving the tolerance of the pulling speed, and reducing the variation of resistivity

Inactive Publication Date: 2010-11-18
SUMCO CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0027]In the silicon single crystal wafer for IGBT of the present invention, the silicon single crystal may be grown at a pulling speed that allows pulling of silicon single crystal free of grown-in defects when grown by the Czochralski method, and may be doped with phosphorous by carrying out neutron irradiation on the silicon single crystal after pulling.
[0063]According to the present invention, a method for manufacturing a silicon single crystal for IGBT and a silicon single crystal for IGBT can be provided which, in addition to allowing an increase in the margin of pulling speed, enable wafers to be produced that have little variation in resistivity.

Problems solved by technology

When silicon single crystal wafers are produced according to the Czochralski method (CZ method), although it is possible to produce large-diameter wafers having a diameter of about 300 mm, wafers produced using the CZ method were not suitable for wafers for IGBT for the reasons indicated below.
During production of IGBT, a gate oxide film is formed on the wafer surface, and if pits formed by exposure of COP defects on the wafer surface or COP defects present in the vicinity of the wafer surface are incorporated in this gate oxide film, gate oxide integrity (GOI) becomes inferior.
Thus, although wafers that do not contain COP defects are required to prevent inferior GOI, it is difficult to manufacture defect-free wafers by the CZ method.

Method used

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experimental example 1

[0106]Silicon ingots having various interstitial oxygen concentrations were produced by the CZ method. More specifically, polycrystalline silicon chunks were placed in a quartz crucible and then the polycrystalline silicon chunks are heated in an argon atmosphere to obtain a silicon melt. Phosphorous as a dopant was added to this silicon melt. The amount of phosphorous added was adjusted such that the resistivity of the silicon single crystal was 65 Ωcm. Next, a seed crystal was immersed in the silicon melt while supplying a horizontal magnetic field of 3000 G (0.3 T) from a magnetic field generator such that the height of the center of the magnetic field was −75 to +50 mm from the surface of the silicone melt, after which the seed crystal and the quartz crucible were rotated while growing single crystals from the bottom of the seed crystal by gradually pulling the seed crystal. Furthermore, the ratio V / G, wherein the single crystal growth rate (pulling speed) is defined as V (mm / mi...

experimental example 2

[0114]Silicon ingots having various interstitial oxygen concentrations were produced by the CZ method. More specifically, polycrystalline silicon chunks were placed in a quartz crucible and then the polycrystalline silicon chunks are heated in an argon atmosphere to obtain a silicon melt. Next, a seed crystal was immersed in the silicon melt while supplying a horizontal magnetic field of 3000 G (0.3 T) from a magnetic field generator such that the height of the center of the magnetic field was −75 to +50 mm from the surface of the silicone melt, after which the seed crystal and quartz crucible were rotated while growing single crystals from the bottom of the seed crystal by gradually pulling the seed crystal. Furthermore, the ratio V / G, wherein the single crystal growth rate (pulling speed) is defined as V (mm / min) and the temperature gradient from the melting point to 1350° C. during single crystal growth is defined as G (° C. / mm), was set to about 0.185, and V was set to 0.49 mm / m...

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Abstract

A method for manufacturing a silicon single crystal wafer for IGBT, including introducing a hydrogen atom-containing substance into an atmospheric gas at a hydrogen gas equivalent partial pressure of 40 to 400 Pa, and growing a single crystal having an interstitial oxygen concentration of 8.5×1017 atoms / cm3 or less at a silicon single crystal pulling speed enabling pulling of a silicon single crystal free of grown-in defects. The silicon single crystal is irradiated with neutrons so as to dope with phosphorous; an n-type dopant is added to the silicon melt; or phosphorous is added to the silicon melt so the phosphorous concentration in the silicon single crystal is 2.9×1013 to 2.9×1015 atoms / cm3; a p-type dopant having a segregation coefficient smaller than that of the phosphorous is added to the silicon melt so the concentration in the single crystal is 1×1013 to 1×1015 atoms / cm3 corresponding to the segregation coefficient thereof.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]This application is a divisional application under 35 U.S.C. §121 of copending U.S. patent application Ser. No. 11 / 708,771 titled SILICON SINGLE CRYSTAL WAFER FOR IGBT AND METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL WAFER FOR IGBT, filed Feb. 20, 2007, which in turn claims the benefit under 35 U.S.C. §119 of Japanese Patent Application No. 2006-043572, filed on Feb. 21, 2006, and from Japanese Patent Application No. 2007-034536, filed on Feb. 15, 2007, the contents of each of which are hereby incorporated by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a silicon single crystal wafer for IGBT used in the production of insulated gate bipolar transistors (IGBT), and a method for manufacturing a silicon single crystal wafer for IGBT.[0004]2. Background Art[0005]Insulated gate bipolar transistors (IGBT) are gate voltage-driven switching devices suitable for controlling high lev...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): C30B15/04H01L21/322
CPCC30B15/00H01L21/261C30B29/06H01L21/20
Inventor ONO, TOSHIAKIUMENO, SHIGERUSUGIMURA, WATARUHOURAI, MASATAKA
Owner SUMCO CORP
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