Apparatus for plasma-enhanced physical vapor deposition of copper with RF source power applied through the workpiece

Abstract

A method of performing physical vapor deposition of copper onto an integrated circuit in a vacuum chamber of a plasma reactor includes providing a copper target near a ceiling of the chamber, placing an integrated circuit wafer on a wafer support pedestal facing the target near a floor of the chamber, introducing a carrier gas into the vacuum chamber, maintaining a target-sputtering plasma at the target to produce a stream comprising at least one of copper atoms and copper ions flowing from the target toward the wafer support pedestal for vapor deposition, and maintaining a wafer-sputtering plasma near the wafer support pedestal by capacitively coupling plasma RF source power to the wafer-sputtering plasma. The frequency of the RF source power is sufficiently high to limit ion energy near the surface of the wafer so that the principal portion of the power provides plasma ion generation. The method further includes maintaining the RF source power at a sufficiently high level to deposit a conformal layer of copper on vertical and horizontal surfaces of the workpiece.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation-in-part of U.S. patent application Ser. No. 11 / 052,011, filed Feb. 3, 2005 entitled “APPARATUS FOR METAL PLASMA VAPOR DEPOSITION AND RE-SPUTTER WITH SOURCE AND BIAS POWER FREQUENCIES APPLIED THROUGH THE WORKPIECE” by Karl M. Brown, et al. and assigned to the present assignee.BACKGROUND OF THE INVENTION [0002] With recent technological advances in integrated circuit design, there are now as many as six to ten interconnect layers of a multilayer interconnect structure overlying the semiconductor transistors. Insulator layers separate the successive conductor layers. The conductor interconnect layers can have completely different conductor patterns and are connected to one another and to the transistor layer at different locations through vias extending vertically through the insulator layers. It is the formation of the vias with which the present invention is concerned. [0003] To reduce resistive power l...

AI Technical Summary

Benefits of technology

[0011] The present invention provides benefits at least approaching those afforded by the internal re-sputtering coil without the need for such a coil. The present invention furthermore provides a way of ameliorating or avoiding non-uniform deposition of the barrier layer, and a way of avoiding or minimizing deposition of the barrier layer on the exposed copper conductor surface forming the floor of the via during formation of the barrier layer.

Problems solved by technology

Because copper tends to diffuse over time through the insulator layer to cause catastrophic short circuiting, a barrier layer that blocks copper diffusion is placed between the copper material and the dielectric material wherever the two materials interface in the integrated circuit.

A problem arises in forming the vias extending vertically between the horizontal interconnect layers, as follows.

The interruption represented by the selective removal of the barrier layer entails a higher production cost and consumes production time.

While this dual-purpose reactor works extremely well, it does entail some additional expense.

In order to avoid process contamination, the re-sputtering coil is formed of pure tantalum, adding cost.

One problem is that the metal vapor deposition process can coat the ceiling with metal and thereby block inductive coupling from the coil antenna.

A more significant problem is that the RF plasma produced by the coil produces a high proportion of metal ions from the target, so that the wafer bias cannot be optimized for etch selectivity to horizontal surfaces without impacting (de-optimizing) the flux of metal ions / vapor from the target.

Typically, however, are large share of the copper ions are deposited on shields in the chamber and otherwise lost while traveling over this long distance.

In addition to the requirement for a copper PVD chamber and a barrier PVD chamber, a third chamber, an etch chamber, must be employed to carry out a pre-deposition cleaning process, since the copper PVD chamber and the barrier PVD / re-sputter chamber are not suitable for clean / etch processes.

Another problem is the tendency of the tantalum and / or tantalum nitride material deposited during formation of the barrier layer to deposit with non-uniform thickness along the via walls, and in particular to accumulate faster near the top corners of the vertical walls and thereby exhibit some tendency toward pinch-off.

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