Reconfigurable hardware acceleration method and system for Gaussian pyramid construction
A Gaussian pyramid and hardware acceleration technology, which is applied in the direction of improving operation speed, electrical digital data processing, processor architecture/configuration, etc., can solve the problems of high hardware overhead, no consideration of edge filling, low hardware utilization, etc.
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[0050] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute conflicts with each other.
[0051] The invention provides a reconfigurable hardware acceleration method for Gaussian pyramid construction, comprising the following steps:
[0052] S1. Store the original image pixel data in the form of row buffer, and output the pixel value matrix to be convolved in parallel by column;
[0053] S2. Adjust the row order of the pixel value matrix to be convoluted, so that the pixel data writt...
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