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Method for reducing dislocation and stress by using layer dislocation, LED epitaxial wafer and application

A technology of LED epitaxial wafers and dislocations, which is applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of reduced overlapping integrals of electron and hole wave functions, reduced probability of radiation recombination, etc., to reduce dislocation density and residual stress , Make up for the effect of lattice constant mismatch

Inactive Publication Date: 2021-02-09
WUHAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

On the one hand, there are more serious non-radiative recombination problems caused by defects in InGaN / GaN quantum wells with high In composition; on the other hand, when InGaN / GaN quantum wells with high In composition are grown on sapphire substrates, larger The difference in lattice constants produces a larger piezoelectric polarization electric field, leading to a decrease in the overlap integral of electron and hole wave functions and a decrease in the probability of radiative recombination

Method used

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  • Method for reducing dislocation and stress by using layer dislocation, LED epitaxial wafer and application
  • Method for reducing dislocation and stress by using layer dislocation, LED epitaxial wafer and application
  • Method for reducing dislocation and stress by using layer dislocation, LED epitaxial wafer and application

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Embodiment 1

[0035] 1) Select the c-plane sapphire substrate, put it into the magnetron sputtering reaction chamber, the target material is high-purity Al, the reaction gas is nitrogen, the carrier gas is argon, and the AlN deposition thickness is 25nm;

[0036] 2) Put it into the MOCVD reaction chamber, pass through ammonia gas and trimethylgallium, and grow GaN with a thickness of 15nm at 800°C;

[0037] 3) Pass in hydrogen and ammonia, and heat up to 1150°C;

[0038] 4) growing a 3 μm thick undoped GaN layer on the stacking fault induction layer;

[0039] 5) Lower the temperature to 1100°C, and grow a 2 μm thick n-type GaN layer on the undoped GaN;

[0040] 6) Grow 9 periods of multi-quantum well layers on n-type GaN, GaN barrier layer: thickness is 15nm, growth temperature is 850°C, InGaN well layer: thickness is 3nm, growth temperature is 700°C;

[0041] 7) heating up to 950°C, and growing a 30nm-thick p-type AlGaN layer on the multiple quantum wells;

[0042] 8) Regrowing a p-type...

Embodiment 2

[0045] 1) Select the c-plane sapphire substrate, put it into the magnetron sputtering reaction chamber, the target material is high-purity Al, the reaction gas is nitrogen, the carrier gas is argon, and the AlN deposition thickness is 20nm;

[0046] 2) Put it into the MOCVD reaction chamber, pass through ammonia gas, trimethylgallium and trimethylaluminum, and grow 10nm thick Al at 900°C 0.2 Ga 0.8 N;

[0047] 3) Pass in hydrogen and ammonia, and heat up to 1150°C;

[0048] 4) Introducing ammonia gas and trimethylgallium to grow a 3 μm thick undoped GaN layer;

[0049] 5) Lower the temperature to 1100°C, and grow a 2.5 μm thick n-type GaN layer on the undoped GaN;

[0050] 6) Grow 8 periods of multiple quantum well layers on n-type GaN, GaN barrier layer: thickness is 13.5nm, growth temperature is 850°C, InGaN well layer: thickness is 3.5nm, growth temperature is 700°C;

[0051] 7) heating up to 950°C, and growing a 30nm-thick p-type AlGaN layer on the multiple quantum wel...

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Abstract

The invention discloses a method for reducing dislocation and stress by using layer faults, an LED epitaxial wafer and application, and is suitable for the technical field of semiconductors. The LED epitaxial wafer structure grown by the method comprises a sapphire substrate, and a lamination fault induction layer, an undoped GaN layer, an n-type GaN layer, a multi-quantum well layer, a p-type AlGaN layer and a p-type GaN layer which are grown in sequence from bottom to top. According to the GaN epitaxial thin film and the manufacturing method thereof, the base plane fault is formed in the epitaxially grown undoped GaN material by utilizing the fault induction layer, and lattice constant mismatch of GaN and sapphire can be compensated, so that the dislocation density and the residual stress of the GaN epitaxial thin film are reduced, and the GaN epitaxial thin film is particularly suitable for constructing a high-indium-component InGaN / GaN multi-quantum-well structure on the undoped GaN layer. Meanwhile, the method has the advantages of being simple and easy to implement, good in repeatability and the like, and has great application value.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for reducing dislocation and stress by using stacking faults, LED epitaxial wafers and applications. Background technique [0002] GaN-based LED devices have the advantages of light weight, small size, environmental protection, energy saving, green health, high reliability and long life. In addition, the emission spectrum of this type of device can cover a wide range from ultraviolet to infrared, and it is expected to realize the monolithic integration of three primary color light-emitting devices, which is of great significance for the development of high-resolution full-color display and lighting. [0003] At present, the external quantum efficiency of commercial GaN-based blue LED devices has exceeded 80%, but due to the lack of high-efficiency GaN-based LED devices in longer light-emitting bands, it is still impossible to achieve high-efficiency full-color dis...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/32H01L33/12H01L33/00H01L33/16
CPCH01L33/0075H01L33/12H01L33/16H01L33/32
Inventor 周圣军唐斌宫丽艳
Owner WUHAN UNIV
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