Low-power-consumption external interrupt wake-up circuit and control method thereof

Abstract

The invention discloses a low-power-consumption external interrupt wake-up circuit. The circuit comprises a Schmitt trigger, a first phase inverter, a first level converter, a second level converter,a third level converter and an AND gate, wherein the Schmitt trigger comprises an input interface used for receiving an external interrupt signal, a signal control end used for controlling the enabling of the external interrupt signal, and an output interface; an input end of the first phase inverter is connected with a power supply control signal for controlling a clock module power supply, and an output end of the first phase inverter is connected with the input end of the first level converter; an output end of the first level converter is connected with an input end of the second level converter; the second level converter comprises two-stage power supply, a first-stage power supply end of the second level converter is connected with the output interface of the Schmitt trigger, and anoutput end of the second level converter is connected with one input end of the AND gate; an input end of the third level converter is connected with a power supply control signal, and an output end of the third level converter is connected with the other input end of the AND gate; and the AND gate outputs a bottom circuit power supply signal for controlling power supply of the bottom circuit.

Description

technical field [0001] The invention relates to the field of circuit wake-up, in particular to a low-power consumption external interrupt wake-up circuit and a control method thereof. Background technique [0002] With the rise of the Internet of Everything and artificial intelligence, more and more low-cost, low-power wireless communication solutions are emerging to provide solutions to the "last mile" problem of the Internet of Things. Low-power design has become a major The technical focus of chip manufacturers. [0003] In order to achieve extremely low power consumption, the chip often needs to enter a deep sleep state with no clock, no power supply or a small part of power supply when there is no work task. This "suicide" power-off that cuts off its own power supply poses a challenge to the design of the wake-up circuit. Therefore, whether the wake-up circuit can operate normally is the key core of the low-power application of the entire chip. [0004] In low-power a...

AI Technical Summary

Problems solved by technology

In the deep sleep state, the digital logic reset part is in a state of no power supply and no clock, and the traditional processing method cannot be used for edge detection. It belongs to the wake-up reset of the power-on process rather than a simple soft reset process. The processing method is difficult to implement.

[0006] In the prior art, clock-independent digital combinatorial logic is often used to wake up the circuit, but it will multiply the size of the digital code and the complexity of the digital logic, and will significantly increase the power consumption of the digital logic with constant power supply

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