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Semiconductor memory device structure and manufacturing method thereof

A storage device and manufacturing method technology, applied to semiconductor devices, electric solid state devices, transistors, etc., can solve the problems of complex process, difficult positioning of contact structures, small windows, etc. short circuit effect

Pending Publication Date: 2018-05-04
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor storage device structure and a manufacturing method thereof, which are used to solve the problem of the small window of the adjacent word line contact structure in the prior art, the complicated process, and the contact structure. Positioning difficulties and other issues

Method used

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  • Semiconductor memory device structure and manufacturing method thereof
  • Semiconductor memory device structure and manufacturing method thereof
  • Semiconductor memory device structure and manufacturing method thereof

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Embodiment Construction

[0071] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0072] see Figure 7a ~ Figure 23 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, so that only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and th...

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Abstract

The invention provides a semiconductor memory device structure and a manufacturing method thereof. The memory device structure comprises a semiconductor substrate, word line structures and contact structures, wherein the semiconductor substrate comprises an active area and a groove isolation structure, the word line structures are formed in the semiconductor substrate and crossed with the active area, a long end tail part is arranged at one end of any word line structure, a short end tail part is arranged at the other end of the word line structure, the long end tail parts and the short end tail parts of adjacent two word line structures are arranged in a staggering manner, and the contact structures are formed at the long end tail parts of the word line structures so that electric lead-out of the word line structure can be realized. According to the semiconductor memory device structure and the manufacturing method thereof, mask design is performed to word line grooves, the word linestructures with the tail parts arranged in a long and short staggering manner are prepared, the occupied areas of the whole regions of the contact structures are not required to be increased, the manufacturing windows of the contact structures can be increased, and the short circuit of adjacent word line structures due to the contact structures is avoided. The tail parts of the word line structures are not required to be bent, the technology complexity is reduced, and the locating difficulty of the contact structures is reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor design and manufacture, and in particular relates to a semiconductor storage device structure and a manufacturing method thereof. Background technique [0002] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell generally includes a capacitor 10 and a transistor 11; the gate of the transistor 11 is connected to the word line 13, the drain is connected to the bit line 12, and the source is connected to the capacitor 10; the voltage signal on the word line 13 can control the transistor 11 Open or close, and then read the data information stored in the capacitor 10 through the bit line 12, or write the data information into the capacitor 10 through the bit line 12 for storage, such as figure 1 shown. [0003] Such as Figure 4 As shown, the word line (Word line) pattern is usually p...

Claims

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Application Information

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IPC IPC(8): H01L27/108
CPCH10B12/37H10B12/038H10B12/48
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC
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