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Multichip integrated CQFP ceramic housing and manufacturing method thereof

A ceramic shell, multi-chip technology, used in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of complex wiring design, on-off failure, low insulation resistance, etc., to achieve good air tightness and reliability. sexual effect

Inactive Publication Date: 2017-09-26
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] With the continuous advancement of thinning and miniaturization of electronic components, the internal wiring design of the multi-chip integrated packaging shell is becoming more and more complicated, which usually requires higher insulation resistance and lower capacitance between leads, which is important for material selection. Wiring design and processing technology are great challenges
Using conventional alumina materials and multi-layer ceramic technology, it is easy to cause on-off failure, low insulation resistance, and high capacitance between leads, which need to be solved urgently

Method used

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  • Multichip integrated CQFP ceramic housing and manufacturing method thereof
  • Multichip integrated CQFP ceramic housing and manufacturing method thereof
  • Multichip integrated CQFP ceramic housing and manufacturing method thereof

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Embodiment

[0029] High insulation and low inter-lead capacitance multi-chip integrated CQFP ceramic shell, its structure is CQFP ceramic package shell size is 25.4mm×25.4mm×3.0mm, internal cavity size is 21.8×21.8×1.25mm, external lead pitch is 1.27mm, and the internal wire spacing is 0.15mm, such as figure 1 shown.

[0030] The ceramic part of the CQFP ceramic package shell contains a total of 8 layers of wiring, and the internal through holes are all 0.12mm in diameter. The layers where the signal lines are located adopt the conventional HTCC wiring design method. The shielding layer between the signal lines adopts grid wiring, and the grid Dislocation layout is used between layers to maximize the insulation resistance between product wires and reduce the capacitance between shielding layers to achieve the purpose of reducing the capacitance between leads. The wiring of key layers is shown in Figure 2.

[0031] The internal wire spacing of the CQFP ceramic package shell is that the in...

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Abstract

The present invention is a multichip integrated CQFP ceramic housing of a capacitor between high-insulation low leads and manufacturing method thereof. The outline dimension of the structure is 25.4mm*25.4mm*3.0mm, the dimension of an inner cavity is 21.8*21.8*1.25mm, the pitch of an external lead is 1.27mm, and the distance of an internal lead is 0.1mm-0.15mm. A porcelain portion comprises 8 layers of wirings. The method comprises: 1) employing high-insulation micro-crystalline ceramic as base materials; 2) performing sintering under the porcelain portion after the sintering; 3) performing chemical nickeling process of the porcelain portion after sintering; 4) welding a metal lead and a metal frame on the corresponding positions of the porcelain portion through a ceramic die; 5) performing nickel electroplating and gold electroplating of the housing which completes braze welding; and 6) realizing different gold plating thicknesses of the chip, the lead and the welding ring are of the same product through local production. The manufactured ceramic packaging housing can satisfy requirements of welding and bonding of different chips, has good air tightness and reliability, can satisfy the requirements of each item performance index of the national military standard.

Description

technical field [0001] The invention relates to a high-insulation and high-density multi-chip integrated CQFP ceramic shell and a manufacturing method thereof, which is aimed at a high-density packaging shell manufacturing method and belongs to the technical field of HTCC multilayer ceramics. Background technique [0002] High-temperature co-fired ceramics (HTCC) technology is a technology that uses high-melting-point metallization pastes such as tungsten to print on 92% to 96% alumina cast raw ceramic belts, and then laminated and laminated, at 1500 ° C ~ The process technology of co-firing at a high temperature of 1600°C. Compared with low-temperature co-fired ceramics (LTCC), high-temperature co-fired ceramics (HTCC) have the advantages of high mechanical strength, stable chemical properties, high heat dissipation coefficient and low material cost. [0003] With the increase of device functions and the requirements for the diversity of packaging forms, a high-density mul...

Claims

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Application Information

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IPC IPC(8): H01L23/498H01L21/48
CPCH01L23/49822H01L21/4857H01L23/49838
Inventor 谢新根周昊龚锦林
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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