Preparation method of GaAs-based horizontal plasma pin diode for multi-layer holographic antenna
A holographic antenna and plasma technology, applied in antennas, antenna parts, antenna supports/mounting devices, etc., can solve problems such as uneven doping concentration, large implant dose and energy, and incompatibility, and achieve enhanced controllability , easy processing, and performance-enhancing effects
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Embodiment 1
[0054]The embodiment of the present invention proposes a method for preparing a GaAs-based lateral plasmonic pin diode for a multilayer holographic antenna, and the GaAs-based plasmonic pin diode is used for making a reconfigurable holographic antenna. See figure 1 , figure 1 It is a structural diagram of a multi-layer reconfigurable holographic antenna according to an embodiment of the present invention. The multi-layer holographic antenna includes: a semiconductor substrate GeOI, an antenna module, a first holographic ring and a second holographic ring; wherein, the The antenna module, the first holographic ring and the second holographic ring all include GaAs-based plasma pin diode strings connected in series; the GaAs-based plasma pin diode strings include a plurality of serially connected GaAs-based plasma pin diode strings. pin diode.
[0055] See image 3 , image 3 It is a flowchart of a method for manufacturing a GaAs-based lateral plasmonic pin diode according to...
Embodiment 2
[0098] See Figure 4a-Figure 4s , Figure 4a-Figure 4s It is a schematic diagram of a method for preparing a Ge-based plasma pin diode according to an embodiment of the present invention. On the basis of the first embodiment above, to prepare a Ge-based solid-state plasma pin diode with a channel length of 22nm (the length of the solid-state plasma region is 100 microns) As an example to describe in detail, the specific steps are as follows:
[0099] Step 1, substrate material preparation steps:
[0100] (1a) if Figure 4a As shown, a GeOI substrate 101 with (100) crystal orientation is selected, and a GaAs layer 102 is deposited on the top layer Ge by MOCVD method, the doping type is p-type, the doping concentration is 1014cm-3, and the thickness of the top layer GaAs is 50 μm ;
[0101] (1b) if Figure 4b As shown, a first SiO2 layer 201 with a thickness of 40nm is deposited on GaAs by chemical vapor deposition (Chemical vapor deposition, CVD for short);
[0102] (1c) ...
Embodiment 3
[0131] Please refer to Figure 5 , Figure 5 It is a schematic diagram of a device structure of a Ge-based plasmonic pin diode according to an embodiment of the present invention. The plasmonic pin diode employs the above as figure 1 The preparation method shown is made, specifically, the plasma pin diode is prepared and formed on the GeOI substrate 301, and the P region 305, the N region 306 of the pin diode and the laterally located between the P region 305 and the N region 306 I regions are located in the top layer of the substrate GaAs302. Wherein, the pin diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 305 and the N region 306, and the depth of the isolation trench 303 is greater than or equal to the thickness of the top Ge layer. In addition, the P region 305 and the N region 306 may respectively include a thin-layer P-type active region 307 and a thin-layer N-type active region 304 along the substrate dire...
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