La-based medium material high-K metal gate structure based on Si substrate and preparation method thereof

Abstract

The invention discloses a La-based medium material high-K metal gate structure based on a Si substrate and a preparation method thereof, and mainly solves the problems that the gate oxide dielectric constant of the conventional high-K metal gate structure is low and gate metal is diffused to the gate oxide. The high-K metal gate structure comprises a La-based high-k gate medium film (1), a TiN barrier layer (2), a Ti oxygen adsorption layer (3) and a heavy metal Pt gate electrode (4) which are arranged on the Si substrate from the bottom to the top. A La2O3 or LaAlO3 or La2O3 / Al2O3 laminated structure of which the thickness is 4-10nm is adopted for the La-based high-k gate medium film; the thickness of the TiN barrier layer is 2-3nm; the thickness of the Ti oxygen adsorption layer is 4-6nm; and the thickness of the heavy metal Pt gate electrode is 100-150nm. The gate oxide dielectric constant is high and the gate oxide / substrate interface property is great so that the structure can be used for manufacturing a high-dielectric-property metal oxide semiconductor field effect transistor.

Description

technical field [0001] The invention belongs to the technical field of semiconductor materials and devices, and in particular relates to a high-K metal gate structure and a preparation method, which can be used for manufacturing metal oxide semiconductor field effect transistors with high dielectric properties, and for the production and preparation of large-scale integrated circuits. Background technique [0002] With the continuous reduction of the integration level of integrated circuits, the size of the metal oxide semiconductor field effect transistor MOSFET is continuously reduced, and the corresponding gate oxide thickness is also continuously reduced. As of 2005, 65nm photolithography technology has become mature, and SiO2 as a gate dielectric film in high-performance field-effect transistor devices 2 The thickness of the layers has been reduced to around 1nm, that is, the spacing of only a few atomic layers. As the oxide thickness continues to decrease, the leakage...

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Problems solved by technology

However, due to the high diffusion coefficient of wafer Si in La-based high-k gate dielectric film, it is easy to form an interface layer with low dielectric constant, which will increase the equivalent oxide layer thickness and deteriorate the device interface characteristics.

[0004] On the other hand, in the traditional high-k metal gate structure, heavy metals are directly deposited on the high-k gate oxide layer as the gate electrode conductive layer, because the heavy metal ions will diffuse to the high-k gate oxide layer, and will be in the high-k gate oxide layer The introduction of impurities will seriously affect the overall quality of the high-K metal gate structure and increase the gate leakage current, thus affecting the reliability of the device

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