Ring-gate structure field effect transistor and preparation method thereof

Abstract

The invention is suitable for a semiconductor device and provides a ring-gate structure field effect transistor, which comprises a substrate, a silicon dioxide layer deposited on the substrate, and grid, source and drain electrodes deposited on the silicon dioxide layer. The grid electrode comprises an active layer, an insulation layer wrapping around the active layer and a metal layer wrapping around the insulation layer, wherein the insulation layer is made of a high-dielectric-constant dielectric material. The ring-gate structure field effect transistor, by adopting the high-dielectric-constant dielectric material to serve as the insulation layer, has a good insulation property, can produce a higher field effect between the grid electrode and a substrate channel, can reduce transistor electric leakage amount and reduce device power consumption and heating, and enables the size of the transistor to be further reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor design, and in particular relates to a gate-around structure field effect transistor and a preparation method thereof. Background technique [0002] Early integrated circuits were basically based on the traditional planar transistor structure. The so-called planar transistor refers to a transistor whose source, drain, gate and channel cross-sections are on the same plane. . Although the development of planar transistor technology has been quite mature so far, and the cost has become increasingly low, but as the feature size of semiconductor devices is proportionally reduced according to Moore's law, the chip integration level continues to increase, and the short channel effect has a serious impact on performance, especially the feature size. The shrinkage leads to a significant increase in the channel effect, resulting in a sharp increase in the off-state current of the device. [0003] In order to ...

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Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a field-effect transistor with a gate-all-around structure and its preparation method, which aims to solve the problem that semiconductor devices affect the performance of semiconductors due to the short channel effect as the feature size of semiconductor devices decreases.

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