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Semiconductor device and manufacturing method thereof, and electronic device

A semiconductor and device technology, applied in the field of semiconductor devices and their preparation, can solve problems such as low withstand current, and achieve the effects of reducing leakage, improving ESD voltage withstand and current withstand capabilities, and improving ESD performance

Active Publication Date: 2017-01-04
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the withstand current of the MOS structure diode is determined by the channel width, its withstand current is relatively low

Method used

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  • Semiconductor device and manufacturing method thereof, and electronic device
  • Semiconductor device and manufacturing method thereof, and electronic device
  • Semiconductor device and manufacturing method thereof, and electronic device

Examples

Experimental program
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Effect test

Embodiment 1

[0032] Below, will refer to figure 1 , figure 2 The semiconductor device manufacturing method of the present invention is described in detail.

[0033] Such as figure 1 As shown, a prior art semiconductor device includes a semiconductor substrate 100 . The semiconductor substrate 100 may be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), insulator Silicon germanium-on-insulator (SiGeOI) and germanium-on-insulator (GeOI), etc. The semiconductor substrate is preferably a P-type substrate doped with B or Ga elements. An N well 105 is then formed on the P-type substrate.

[0034] The N well 105 can grow a layer of SiO on the surface of the P-type substrate 2 , in SiO 2 Coat photoresist for photolithography to form N-well doped window, and then use HF to etch SiO at the window 2 And remove the glue. At this time, N-type impurities can be implanted into the window to...

Embodiment 2

[0054] Below, will refer to figure 2 The semiconductor device of the present invention will be described in detail.

[0055] Such as figure 2 As shown, the semiconductor device of the present invention includes a semiconductor substrate 200 . The semiconductor substrate may be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-on-insulator Silicon germanium (SiGeOI) and germanium on insulator (GeOI), etc. The semiconductor substrate is preferably a P-type substrate doped with B or Ga elements.

[0056] A shallow trench isolation (STI) structure 201 may also be included on the semiconductor substrate. Generally, the basic process of forming the STI structure 201 is as follows: 2 O or O 2 The substrate is thermally oxidized under air flow to form SiO 2 Thin layer, about 20nm thick. followed by SiO 2 On the thin layer, silicon nitride with a thickness of abo...

Embodiment 3

[0064] The present invention also provides an electronic device, which includes the semiconductor device described in Embodiment 2 and an electronic component connected to the semiconductor device.

[0065] Wherein the semiconductor device includes: a semiconductor substrate; a first well region with a first conductivity type formed in the semiconductor substrate; a well region with a first conductivity type formed outside the first well region in the semiconductor substrate a second well region of the first conductivity type; a first diffusion region of the second conductivity type formed in the first well region; a second diffusion region of the first conductivity type formed in the second well region, Wherein the ion concentration of the first conductivity type in the first well region is lower than the ion concentration of the first conductivity type in the second well region. The first diffusion region of the second conductivity type and the first well region of the first...

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Abstract

The invention provides a manufacturing method of a semiconductor device. The manufacturing method comprises the steps of: providing a semiconductor substrate; performing first ion implantation by using a first photomask, so as to form a first well region of a first conductivity type in the semiconductor substrate; performing second ion implantation by using a second photomask, so as to form a second well region of the first conductivity type in the semiconductor substrate; forming a first diffusion region of a second conductive type in the first well region; and forming a second diffusion region of the first conductivity type in the second well region, wherein the second well region positions on the outer side of the first well region, and a concentration of ions of the first conductivity type in the first well region is lower than that that of ions of the first conductivity type in the second well region. The invention further provides a semiconductor device manufactured by adopting the semiconductor device, and an electronic device. Compared with the prior art, the semiconductor diode device manufactured by adopting the manufacturing method and the electronic device comprising the same can improve the ESD voltage tolerance and current tolerance, and effectively reduce electric leakage and improve the ESD performance of the devices.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device, a preparation method thereof, and an electronic device. Background technique [0002] With the continuous development of semiconductor technology, the improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. Currently, the semiconductor industry has progressed to nanotechnology process nodes in pursuit of high device density, high performance, and low cost. However, this progressive trend has a negative impact on the reliability of end products: In the field of semiconductor technology, the electrostatic discharge (ESD) phenomenon is a major threat to integrated circuits, which can break down integrated circuits and semiconductor components, causing Component aging reduces production yield. Therefore, with the continuous reduction of the size of the sem...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/861H01L21/329H01L23/60
CPCH01L23/60H01L29/6609H01L29/861
Inventor 施森华胡王凯
Owner SEMICON MFG INT (SHANGHAI) CORP
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