Laterally diffused field effect transistor and its manufacturing method

Abstract

The invention discloses a lateral diffusion field effect transistor, comprising: a buried layer doped with a second conductive type is formed in a drift region doped with a first conductive type, and the buried layer is divided into a plurality of buried layers with different concentrations and different depths. Layer segment; two adjacent buried layer segments are vertically misaligned to reduce the JFET effect between the channel region and the drift region to improve the current conduction area of ​​the drift region when the device is turned on; the closest to the channel The doping concentration of the buried layer section of the region is greater than that of other buried layer sections, and the doping concentration of the buried layer section closest to the channel region enables the drift region adjacent to the side of the channel region to be controlled at the initial stage of the drain terminal voltage. fully exhausted. The invention also discloses a manufacturing method of the lateral diffusion field effect transistor. The invention can prevent low voltage breakdown, increase breakdown voltage, increase conduction area of ​​leakage current and reduce conduction resistance of devices.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a lateral diffusion field effect transistor; the invention also relates to a manufacturing method of the lateral diffusion field effect transistor. Background technique [0002] Ultra-high voltage lateral diffusion field effect transistor (LDMOS) usually inserts a buried layer opposite to the conductivity type of the drift region in the drift region. The buried layer can help the drift region to be depleted, so that the concentration of the drift region can be appropriately increased, and the ultra-high voltage LDMOS can also be guaranteed. breakdown voltage. [0003] Such as figure 1 Shown is a schematic diagram of the structure of the existing lateral diffusion field effect transistor; taking N-type LDMOS as an example, the existing LDMOS includes: [0004] The drift region 102 is composed of a deep N well formed in a P-type semiconductor substrat...

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Problems solved by technology

[0015] like Figure 2B shown, is figure 1 The depletion region simulation diagram of the existing device shown; it can be seen that the drift region in the region corresponding to the dotted circle 203 has not been fully depleted

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