Efficient cooling system of graphene composite/silicon nitride/silicon chip

Abstract

The invention provides a cooling system based on the multi-layer structure of a graphene composite / silicon nitride / silicon chip, and an establishing method of the cooling system, and belongs to the cooling technology of microelectronic devices. A cooling framework comprises a silicon-based heating device, a Si3N4 insulating layer, a graphene composite heat sink and a base plate. The dense Si3N4 insulating layer is deposited on the back face of a silicon wafer through a chemical gas-phase depositing method, a graphene composite and the Si3N4 insulating layer are connected through a chemical bond, and finally the silicon wafer with the cooling framework and the base plate are connected and packaged into a device. The silicon-based heating device, a thermal interface material and the heat sink are connected through chemical bonds, and therefore the distances of device layers are greatly reduced, thermal resistance caused by interlayer micro gaps is avoided, phonon thermal conductance is promoted, the cooling capacity of the whole cooling system is improved, and the chip can work at a severe high temperature. After package, the whole system is lighter and thinner and meets the development tendency of an up-to-date semiconductor device.

Description

technical field [0001] The invention belongs to the heat dissipation technology of microelectronic devices, in particular to a heat dissipation system and a construction method based on a graphene composite material / silicon nitride / silicon chip multilayer structure. Background technique [0002] In recent years, with the development trend of miniaturization, multi-function and high-density integration of electronic devices, thermal management has become an important guarantee for the normal operation of various high-power electronic devices. The heat flux generated by the current computer CPU chip has reached 100W / cm 2 (Kaby Lake produced by Intel), the hottest area can reach 300W / cm 2 . As the transistor size on the CPU chip drops to the nanometer level (14nm), the integration density rises rapidly. According to MudawarI's prediction, the heat flux density in future electronic devices is likely to exceed 1000W / cm 2 . In fact, not only for computer chips, but also for ae...

AI Technical Summary

Problems solved by technology

[0003] At present, for the flip-chip process, the commonly used architecture is chip / polymer thermal interface material / heat sink. In this architecture, since the connection between the silicon chip and the polymer thermal interface material is van der Waals force, the two The distance between them is relatively wide, which is not conducive to the conduction of phonons in the silicon chip to the thermal interface material and the external environment, and the intrinsic thermal conductivity of common thermal interface materials is not high (2~3W / cm 2 )

Therefore, limited by the thermal conductivity of the material and the large interface thermal resistance, this thermal management problem has become a bottleneck in the development of high-power devices.

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