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Semiconductor device

A semiconductor and substrate technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problems of process flow difficulties, inability to fully utilize SiC features, and reduced mechanical strength of SiC chips, and achieve reliable welding. Effect

Inactive Publication Date: 2015-02-25
FUJI ELECTRIC CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, in the following Patent Document 2, the SiC chip on the portion other than the portion where the recess is provided is 400 μm thick, but the thickness of the SiC chip on the portion where the recess is provided is as thick as 200 μm, and the SiC chip cannot be fully utilized. inherent strengths
The reason for this is that if it is desired to further increase the depth of the concave portion and reduce the thickness of the SiC chip on the portion where the concave portion is provided in order to reduce the on-resistance, the mechanical strength of the SiC chip may decrease, which may degrade the process. flow becomes difficult

Method used

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  • Semiconductor device
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Examples

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Embodiment 1

[0053] figure 1 It is an explanatory diagram showing the structure of the semiconductor device according to Embodiment 1 of the present invention. figure 1 (a) is a sectional view, figure 1 (b) is a plan view when viewing a semiconductor chip from the back surface. in addition, figure 1 (c) is figure 1 Section view on line B-B' of (b), figure 1 (d) is figure 1 Sectional view on line A-A' of (b). In Example 1, a SiC substrate (semiconductor chip) 100 in which an SiC epitaxial layer was formed on a bulk substrate (hereinafter referred to as bulk SiC) made of silicon carbide (SiC) was used, and the surface on the side of the SiC epitaxial layer was used as a chip. Surface The surface element structure 102 of MOSFET is formed on the surface of the chip. Bulk SiC and SiC epitaxial layers are n-type.

[0054] Specifically, on the SiC epitaxial layer on the surface side of the semiconductor chip 100, a MOS gate (insulated gate composed of a metal-oxide film-semiconduct...

Embodiment 2

[0080] Example 2 is an example in which the groove shape of the rib on the back surface of the chip is changed from Example 1. Figure 7 It is an explanatory diagram showing the structure of a semiconductor device according to Embodiment 2 of the present invention. Figure 7 (a) is a plan view when viewing a semiconductor chip from the back surface. in addition, Figure 7 (b) is Figure 7 Section view on line B-B' of (a), Figure 7 (c) is Figure 7 Sectional view on line A-A' of (a). In Embodiment 2, as the shape of the groove 105 for suppressing the rotation of the semiconductor chip, the side wall of the groove 105 on the side away from the corner of the rib 101 is inclined relative to the other side wall so that the rib 101 The inner peripheral side increases the width of the groove 105 toward the side away from the corner of the rib 101 , and the width of the groove 105 becomes smaller from the inner side toward the outer side. In the chip mounted on the solder pellets...

Embodiment 3

[0082] Example 3 is an example in which the planar shape of the concave portion on the back surface of the chip is changed from Example 1. Figure 8 It is an explanatory diagram showing the structure of a semiconductor device according to Embodiment 3 of the present invention. Figure 8 (a) is a plan view when viewing a semiconductor chip from the back surface, Figure 8 (b) is Figure 8 Sectional view on line A-A' of (a). In Example 3, the planar shape of the concave portion 103 on the back surface of the chip is circular so that voids are less likely to be generated inside the concave portion 103 . In this example, measures to suppress the rotation of the semiconductor chip are not given to the groove 105 , but the shape of the groove 105 may be changed as in the first and second embodiments to take measures to suppress the rotation of the semiconductor chip.

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Abstract

A groove for air ventilation is formed in a rib with a substantially rectangular ring shape which is provided so as to surround a concave portion provided in a rear surface of a semiconductor chip. The groove is provided in each side or at each corner of the rib so as to traverse the rib from the inner circumference to the outer circumference of the rib. The depth of the groove is equal to or less than the depth of the concave portion provided in the rear surface of the chip. In this way, it is possible to reliably solder a semiconductor device, in which the concave portion is provided in the rear surface of the semiconductor chip and the rib is provided in the outer circumference of the concave portion, to a base substrate, without generating a void in a drain electrode provided in the concave portion.

Description

technical field [0001] The present invention relates to a semiconductor device in which a current flows in the thickness direction of a semiconductor substrate, such as a vertical transistor and a vertical diode. Background technique [0002] Conventionally, semiconductor devices include a lateral element in which a current flows through one principal surface of a semiconductor substrate in a direction parallel to the principal surface, and a vertical element in which a current flows in a thickness direction of the semiconductor substrate. Among them, in vertical devices, it is effective to reduce the thickness of the semiconductor substrate within a range in which a desired breakdown voltage can be maintained in order to reduce on-resistance during operation to reduce conduction loss. In general, thin semiconductor substrates (semiconductor chips) can be fabricated (manufactured) by forming an element structure on the front side while the thickness of the semiconductor subs...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336H01L29/12H01L29/861H01L29/868
CPCH01L2924/13091H01L2924/1305H01L29/0657H01L29/0603H01L29/6606H01L24/06H01L29/7395H01L29/1608H01L2224/0601H01L2924/13055H01L2924/10155H01L2924/15787H01L2924/00
Inventor 井口研一
Owner FUJI ELECTRIC CO LTD
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